Hitachi SR2201
Encyclopedia
The HITACHI SR2201 was a distributed memory
parallel system that was introduced in March 1996 by Hitachi
. Its processor, the 150 MHz HARP-1E based on the PA-RISC
1.1 architecture, solved the cache miss penalty by pseudo vector processing (PVP). In PVP, data was loaded by prefetching
to a special register
bank
, bypassing the cache. Each processor had a peak performance of 300 MFLOPS, giving the SR2201 a peak performance of 600 GFLOPS. Up to 2048 RISC processors could be connected via a high-speed three dimensional crossbar
network, which was able to transfer data at 300 MB/s over each link.
In February 1996, two 1024-node systems were installed at the Universities of Tokyo and Tsukuba. The latter has been extended to the non-commercial CP-PACS system. An upgrade to a 2048-node system, which reached a peak speed of 614 GFLOPS, was completed at the end of September 1996. The 1024 processor system of the SR2201 achieved 220.4 GFLOPS on the LINPACK
benchmark, which corresponded to 72% of the peak performance.
Distributed memory
In computer science, distributed memory refers to a multiple-processor computer system in which each processor has its own private memory. Computational tasks can only operate on local data, and if remote data is required, the computational task must communicate with one or more remote processors...
parallel system that was introduced in March 1996 by Hitachi
Hitachi
Hitachi is a multinational corporation specializing in high-technology.Hitachi may also refer to:*Hitachi, Ibaraki, Japan*Hitachi province, former province of Japan*Prince Hitachi and Princess Hitachi, members of the Japanese imperial family...
. Its processor, the 150 MHz HARP-1E based on the PA-RISC
PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture...
1.1 architecture, solved the cache miss penalty by pseudo vector processing (PVP). In PVP, data was loaded by prefetching
Prefetching
Prefetching may refer to:* Instruction prefetch, in computer architecture, a microprocessor speedup technique* Prefetch input queue , in computer architecture, pre-loading machine code from memory...
to a special register
Processor register
In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are addressed by mechanisms other than main memory and can be accessed more quickly...
bank
Bank
A bank is a financial institution that serves as a financial intermediary. The term "bank" may refer to one of several related types of entities:...
, bypassing the cache. Each processor had a peak performance of 300 MFLOPS, giving the SR2201 a peak performance of 600 GFLOPS. Up to 2048 RISC processors could be connected via a high-speed three dimensional crossbar
Crossbar
- Structural engineering :* A primitive latch consisting of a post barring a door* The top tube of a bicycle frame* The horizontal member of many sports goals including those for hockey, association football, rugby league, rugby union and American football...
network, which was able to transfer data at 300 MB/s over each link.
In February 1996, two 1024-node systems were installed at the Universities of Tokyo and Tsukuba. The latter has been extended to the non-commercial CP-PACS system. An upgrade to a 2048-node system, which reached a peak speed of 614 GFLOPS, was completed at the end of September 1996. The 1024 processor system of the SR2201 achieved 220.4 GFLOPS on the LINPACK
LINPACK
LINPACK is a software library for performing numerical linear algebra on digital computers. It was written in Fortran by Jack Dongarra, Jim Bunch, Cleve Moler, and Gilbert Stewart, and was intended for use on supercomputers in the 1970s and early 1980s...
benchmark, which corresponded to 72% of the peak performance.
External links
- HITACHI SR2201 Massively Parallel Processor, Hitachi Ltd.
- CP-PACS Project, University of Tsukuba.