Flat memory model
Encyclopedia
Flat memory model or linear memory model refers to a memory addressing paradigm
in low-level
software design such that the CPU can directly (and sequentially/linearly) address
all of the available memory
locations without having to resort to any sort of memory segmentation or paging
schemes.
Memory management and logical
-to-physical address
translation can still be implemented on top of a flat memory model in order to facilitate the operating system
's functionality, resource protection, multitasking
or to increase the memory capacity beyond the limits imposed by the processor's physical address space, but the key feature of a flat memory model is that the entire memory space is linear, sequential and contiguous from address zero to MaxBytes-1.
Memory management is therefore optional; it is neither necessary, nor dictated by the CPU architecture:
The vast majority of processor architectures do implement a flat memory design, including all early 8-bit
processors, the Motorola 68K series, etc. The original Intel 8086
was an exception to this rule which implemented a segmented memory model, because it provided an easy form of memory management with flexible page boundaries for early operating systems such as DOS
and allowed access to an address space greater than what would otherwise be available with its 16-bit addressing.
Within the x86 architectures, when operating in the real (compatible) mode, physical address is computed as:
Address = 16*segment + offset
(e.g. The 16-bit segment register is shifted left by 4 bits and added to a 16-bit offset, resulting in a 20-bit address.)
architectures.
A Von Neumann architecture
specifies that instructions and data are both stored within the same memory and transferred over the same bus. This type of architecture is the most space efficient, because any memory not used by the program is available for data and vice versa. It is most often used in general computing.
A Harvard architecture
, on the other hand, separates instructions and data into two separate memories which are typically accessed over two separate buses
. The benefit is an increase in system performance because data (for the present instruction) and code (for the future instruction) can be fetched at the same time. Also, in a Harvard architecture, the instruction and data buses can have different speeds and geometries. The drawback is that Harvard architectures force the designer to make assumptions about the ratio of instruction vs data memory, and this memory cannot be re-allocated at run time. The system is therefore unavoidably more wasteful. This type of architecture is most often used in digital signal processing
(DSP), real-time control
and ultra high-speed RISC applications, where performance is of utmost importance and everything else is secondary.
The point is that neither of the above architectures makes any claims whether the memory addressing model is flat, segmented, paged or otherwise.
Paradigm
The word paradigm has been used in science to describe distinct concepts. It comes from Greek "παράδειγμα" , "pattern, example, sample" from the verb "παραδείκνυμι" , "exhibit, represent, expose" and that from "παρά" , "beside, beyond" + "δείκνυμι" , "to show, to point out".The original Greek...
in low-level
Low-level programming language
In computer science, a low-level programming language is a programming language that provides little or no abstraction from a computer's instruction set architecture. Generally this refers to either machine code or assembly language...
software design such that the CPU can directly (and sequentially/linearly) address
Memory address
A digital computer's memory, more specifically main memory, consists of many memory locations, each having a memory address, a number, analogous to a street address, at which computer programs store and retrieve, machine code or data. Most application programs do not directly read and write to...
all of the available memory
Computer memory
In computing, memory refers to the physical devices used to store programs or data on a temporary or permanent basis for use in a computer or other digital electronic device. The term primary memory is used for the information in physical systems which are fast In computing, memory refers to the...
locations without having to resort to any sort of memory segmentation or paging
Paging
In computer operating systems, paging is one of the memory-management schemes by which a computer can store and retrieve data from secondary storage for use in main memory. In the paging memory-management scheme, the operating system retrieves data from secondary storage in same-size blocks called...
schemes.
Memory management and logical
Logical address
In computing, a logical address is the address at which an item appears to reside from the perspective of an executing application program....
-to-physical address
Physical address
In computing, a physical address, also real address, or binary address, is the memory address that is represented in the form of a binary number on the address bus circuitry in order to enable the data bus to access a particular storage cell of main memory.In a computer with virtual memory, the...
translation can still be implemented on top of a flat memory model in order to facilitate the operating system
Operating system
An operating system is a set of programs that manage computer hardware resources and provide common services for application software. The operating system is the most important type of system software in a computer system...
's functionality, resource protection, multitasking
Computer multitasking
In computing, multitasking is a method where multiple tasks, also known as processes, share common processing resources such as a CPU. In the case of a computer with a single CPU, only one task is said to be running at any point in time, meaning that the CPU is actively executing instructions for...
or to increase the memory capacity beyond the limits imposed by the processor's physical address space, but the key feature of a flat memory model is that the entire memory space is linear, sequential and contiguous from address zero to MaxBytes-1.
Memory management is therefore optional; it is neither necessary, nor dictated by the CPU architecture:
- In a simple controller, or in a single tasking embedded application, where memory management is not needed nor desirable, the flat memory model is the most appropriate, because it provides the simplest interface from the programmer's point of view, with direct access to all memory locations and minimum design complexity.
- In a general purpose computer system, which requires multitasking, resource allocation and protection, the flat memory system must be augmented by some memory management scheme, which is typically implemented through a combination of dedicated hardware (inside or outside the CPU) and software built into the operating system. The flat memory model (at the physical addressing level) still provides the greatest flexibility for implementing this type of memory management.
The vast majority of processor architectures do implement a flat memory design, including all early 8-bit
8-bit
The first widely adopted 8-bit microprocessor was the Intel 8080, being used in many hobbyist computers of the late 1970s and early 1980s, often running the CP/M operating system. The Zilog Z80 and the Motorola 6800 were also used in similar computers...
processors, the Motorola 68K series, etc. The original Intel 8086
Intel 8086
The 8086 is a 16-bit microprocessor chip designed by Intel between early 1976 and mid-1978, when it was released. The 8086 gave rise to the x86 architecture of Intel's future processors...
was an exception to this rule which implemented a segmented memory model, because it provided an easy form of memory management with flexible page boundaries for early operating systems such as DOS
DOS
DOS, short for "Disk Operating System", is an acronym for several closely related operating systems that dominated the IBM PC compatible market between 1981 and 1995, or until about 2000 if one includes the partially DOS-based Microsoft Windows versions 95, 98, and Millennium Edition.Related...
and allowed access to an address space greater than what would otherwise be available with its 16-bit addressing.
Flat memory model
- Simple interface for programmers, clean design
- Greatest flexibility
- Minimum hardware and CPU real estate for simple controller applications
- Maximum execution speed
- Not suitable for general computing or multitasking operating systems, unless enhanced with additional memory management hardware/software; but this is almost always the case in modern CISCComplex instruction set computerA complex instruction set computer , is a computer where single instructions can execute several low-level operations and/or are capable of multi-step operations or addressing modes within single instructions...
processors, which implement advanced memory management and protection technology over a flat memory model. LinuxLinuxLinux is a Unix-like computer operating system assembled under the model of free and open source software development and distribution. The defining component of any Linux system is the Linux kernel, an operating system kernel first released October 5, 1991 by Linus Torvalds...
e.g. uses a flat memory model compare X86 memory segmentation#Practices.
Paged memory model
- Suitable for multitasking, general operating system design, resource protection and allocation
- Suitable for virtual memory implementation
- More CPU real estate, somewhat lower speed
- More complex to program
- Rigid page boundaries, not always the most memory efficient
- This is the memory model Pentium ProPentium ProThe Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
and newer x86 cpus use in 32-bit addressing mode when addressing memory using 36-bit addresses. It's called Physical Address ExtensionPhysical Address ExtensionIn computing, Physical Address Extension is a feature to allow x86 processors to access a physical address space larger than 4 gigabytes....
.
Segmented memory model
- Similar to paged memory, but paging is achieved by the implicit addition of two relatively shifted registers: segment:offset
- Variable page boundaries, more efficient and flexible than the paged memory model
- Quite complex and awkward from a programmer's point of view
- More difficult for compilers
- Pages can overlap / poor resource protection and isolation
- Many to one address translation correspondence: Many segment:offset combinations resolve to the same physical address
- Greater chance of programming errors
- Implemented in original Intel 8086, 8088, 80186, 80286 and supported by 80386 and all subsequent x86 machines through to present day PentiumPentiumThe original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus,...
and Core 2 processors. This memory model has remained ever since in the x86 machines, which now provide multi-mode operation and rarely operate in the compatible segmented mode anyway.
Within the x86 architectures, when operating in the real (compatible) mode, physical address is computed as:
Address = 16*segment + offset
(e.g. The 16-bit segment register is shifted left by 4 bits and added to a 16-bit offset, resulting in a 20-bit address.)
Von Neumann vs. Harvard architectures
Finally, there seems to be some confusion regarding the relationship between a flat memory model and Von Neumann vs HarvardHarvard architecture
The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape and data in electro-mechanical counters...
architectures.
A Von Neumann architecture
Von Neumann architecture
The term Von Neumann architecture, aka the Von Neumann model, derives from a computer architecture proposal by the mathematician and early computer scientist John von Neumann and others, dated June 30, 1945, entitled First Draft of a Report on the EDVAC...
specifies that instructions and data are both stored within the same memory and transferred over the same bus. This type of architecture is the most space efficient, because any memory not used by the program is available for data and vice versa. It is most often used in general computing.
A Harvard architecture
Harvard architecture
The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape and data in electro-mechanical counters...
, on the other hand, separates instructions and data into two separate memories which are typically accessed over two separate buses
Memory bus
The memory bus is the computer bus which connects the main memory to the memory controller in computer systems. Originally, general-purpose buses like VMEbus and the S-100 bus were used, but to reduce latency, modern memory buses are designed to connect directly to DRAM chips, and thus are...
. The benefit is an increase in system performance because data (for the present instruction) and code (for the future instruction) can be fetched at the same time. Also, in a Harvard architecture, the instruction and data buses can have different speeds and geometries. The drawback is that Harvard architectures force the designer to make assumptions about the ratio of instruction vs data memory, and this memory cannot be re-allocated at run time. The system is therefore unavoidably more wasteful. This type of architecture is most often used in digital signal processing
Digital signal processing
Digital signal processing is concerned with the representation of discrete time signals by a sequence of numbers or symbols and the processing of these signals. Digital signal processing and analog signal processing are subfields of signal processing...
(DSP), real-time control
Real-time control
Real-time control is a popular term for a certain class of digital controllers. For effective digital control, it is critical that sample time be constant. Real-time control achieves nearly constant sample time....
and ultra high-speed RISC applications, where performance is of utmost importance and everything else is secondary.
The point is that neither of the above architectures makes any claims whether the memory addressing model is flat, segmented, paged or otherwise.