LOCOS
Encyclopedia
LOCOS, short for LOCal Oxidation of Silicon, is a microfabrication
process where silicon dioxide
is formed in selected areas on a silicon wafer having the Si-SiO2 interface at a lower point than the rest of the silicon surface.
This technology was developed to insulate MOS transistors from each other. The main goal is to create a silicon oxide
insulating structure that penetrates under the surface of the wafer, so that the Si-SiO2 interface occurs at a lower point than the rest of the silicon surface. This cannot be easily achieved by etching field oxide. Thermal oxidation
of selected regions surrounding transistors is used instead. The oxygen penetrates in depth of the wafer, reacts with silicon and transforms it in to silicon oxide. In this way, an immersed structure is formed.
The immersed insulating barrier limits the transistor cross-talk.
I. Preparation of silicon substrate (layer 1)
II. CVD deposition of SiO2, pad/buffer oxide (layer 2)
III. CVD deposition of Si3N4, nitride mask (layer 3)
IV. Etching of nitride layer (layer 3) and silicon oxide layer (layer 2)
V. Thermal growth of silicon oxide (structure 4)
VI. Further growth of thermal silicon oxide (structure 4)
VII. Removal of nitride mask (layer 3)
There are 4 basic layers/structures:
To perform local oxidation, the areas not meant to be oxidized will be coated in a material that does not permit the diffusion
of oxygen at high temperatures (thermal oxidation
is performed in temperatures between 800 and 1200°C), such as silicon nitride
(layer 3, step III).
During the growth of the immersed insulating thermal oxide structures (steps V and VI), the silicon nitride layer (layer 3) is pushed upwards. Without the buffer oxide (layer 2, also known as pad oxide), this would create too much tension in the Si substrate (layer 1), the plastic deformation would occur and the electronic devices would be damaged.
Therefore a buffer oxide (layer 2) is deposed by the CVD
(step II) between the Si substrate (layer 1) and the silicon nitride (layer 3). At high temperatures, the viscosity of silicon oxide decreases and the stress created between the silicon substrate (layer 1) and nitride layer (layer 3), by the growth of the thermal oxide (steps V and VI), is relieved.
The insulating structures (structure 4) are formed by thermal oxidation
of silicon. During this process, the silicon wafer is "consumed" and "replaced" by silicon oxide. The volume of silicon oxide to silicon is about 2.4:1, which explains the growth of the insulation structures and the created tension.
The disadvantage of this technology is that the insulating structures are rather large, and therefore, less MOS transistors can be formed on one wafer.
Reduction of dimensions of insulating structures is solved by the STI
(Shallow Trench Isolation, also known as Box Isolation Technique). In this process, trenches are formed and silicon dioxide is deposed inside. The LOCOS technology can't be used in this way, because of the change of the volume during the thermal oxidation, which would induce too much stress in the trenches.
Microfabrication
Microfabrication is the term that describes processes of fabrication of miniature structures, of micrometre sizes and smaller. Historically the earliest microfabrication processes were used for integrated circuit fabrication, also known as "semiconductor manufacturing" or "semiconductor device...
process where silicon dioxide
Silicon dioxide
The chemical compound silicon dioxide, also known as silica , is an oxide of silicon with the chemical formula '. It has been known for its hardness since antiquity...
is formed in selected areas on a silicon wafer having the Si-SiO2 interface at a lower point than the rest of the silicon surface.
This technology was developed to insulate MOS transistors from each other. The main goal is to create a silicon oxide
Silicon oxide
Silicon oxide may refer to either of the following:*Silicon dioxide, SiO2, very well characterized*Silicon monoxide, SiO, not very well characterized...
insulating structure that penetrates under the surface of the wafer, so that the Si-SiO2 interface occurs at a lower point than the rest of the silicon surface. This cannot be easily achieved by etching field oxide. Thermal oxidation
Thermal oxidation
In microfabrication, thermal oxidation is a way to produce a thin layer of oxide on the surface of a wafer. The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Deal-Grove model...
of selected regions surrounding transistors is used instead. The oxygen penetrates in depth of the wafer, reacts with silicon and transforms it in to silicon oxide. In this way, an immersed structure is formed.
The immersed insulating barrier limits the transistor cross-talk.
Process
Typical process steps are the following:I. Preparation of silicon substrate (layer 1)
II. CVD deposition of SiO2, pad/buffer oxide (layer 2)
III. CVD deposition of Si3N4, nitride mask (layer 3)
IV. Etching of nitride layer (layer 3) and silicon oxide layer (layer 2)
V. Thermal growth of silicon oxide (structure 4)
VI. Further growth of thermal silicon oxide (structure 4)
VII. Removal of nitride mask (layer 3)
There are 4 basic layers/structures:
- Si, silicon substrate, wafer
- SiO2, buffer oxide (pad oxide), chemical vapor deposition silicon oxide
- Si3N4, nitride mask
- SiO2, insulation oxide, thermal o
Function of layers and structures
The silicon wafer (layer 1) is used as a basis for building electronic structures (such as MOS transistors).To perform local oxidation, the areas not meant to be oxidized will be coated in a material that does not permit the diffusion
Diffusion
Molecular diffusion, often called simply diffusion, is the thermal motion of all particles at temperatures above absolute zero. The rate of this movement is a function of temperature, viscosity of the fluid and the size of the particles...
of oxygen at high temperatures (thermal oxidation
Thermal oxidation
In microfabrication, thermal oxidation is a way to produce a thin layer of oxide on the surface of a wafer. The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Deal-Grove model...
is performed in temperatures between 800 and 1200°C), such as silicon nitride
Silicon nitride
Silicon nitride is a chemical compound of silicon and nitrogen. If powdered silicon is heated between 1300° and 1400°C in an atmosphere of nitrogen, trisilicon tetranitride, Si3N4, is formed. The silicon sample weight increases progressively due to the chemical combination of silicon and nitrogen...
(layer 3, step III).
During the growth of the immersed insulating thermal oxide structures (steps V and VI), the silicon nitride layer (layer 3) is pushed upwards. Without the buffer oxide (layer 2, also known as pad oxide), this would create too much tension in the Si substrate (layer 1), the plastic deformation would occur and the electronic devices would be damaged.
Therefore a buffer oxide (layer 2) is deposed by the CVD
Chemical vapor deposition
Chemical vapor deposition is a chemical process used to produce high-purity, high-performance solid materials. The process is often used in the semiconductor industry to produce thin films. In a typical CVD process, the wafer is exposed to one or more volatile precursors, which react and/or...
(step II) between the Si substrate (layer 1) and the silicon nitride (layer 3). At high temperatures, the viscosity of silicon oxide decreases and the stress created between the silicon substrate (layer 1) and nitride layer (layer 3), by the growth of the thermal oxide (steps V and VI), is relieved.
The insulating structures (structure 4) are formed by thermal oxidation
Thermal oxidation
In microfabrication, thermal oxidation is a way to produce a thin layer of oxide on the surface of a wafer. The technique forces an oxidizing agent to diffuse into the wafer at high temperature and react with it. The rate of oxide growth is often predicted by the Deal-Grove model...
of silicon. During this process, the silicon wafer is "consumed" and "replaced" by silicon oxide. The volume of silicon oxide to silicon is about 2.4:1, which explains the growth of the insulation structures and the created tension.
The disadvantage of this technology is that the insulating structures are rather large, and therefore, less MOS transistors can be formed on one wafer.
Reduction of dimensions of insulating structures is solved by the STI
Shallow trench isolation
Shallow trench isolation , also known as Box Isolation Technique, is an integrated circuit feature which prevents electrical current leakage between adjacent semiconductor device components. STI is generally used on CMOS process technology nodes of 250 nanometers and smaller...
(Shallow Trench Isolation, also known as Box Isolation Technique). In this process, trenches are formed and silicon dioxide is deposed inside. The LOCOS technology can't be used in this way, because of the change of the volume during the thermal oxidation, which would induce too much stress in the trenches.