The Core brand of Intel's 32-bit single- and dual-core mobile microprocessor

Microprocessor

A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...

 is based on the P6 microarchitecture

P6 (microarchitecture)

The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...

. Intel Core branched off as Duo (dual-core) and Solo (Duo with one disabled core).

"Yonah" (65 nm)

• All models support: MMX, SSE
  Streaming SIMD Extensions
  In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
  
  , SSE2
  SSE2
  SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
  
  , SSE3
  SSE3
  SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
  
  , EIST
  SpeedStep
  SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
  
  , XD bit (an NX bit
  NX bit
  The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
  
   implementation), CPU models not ending in 50 support Intel VT-x
• Die
  Die (integrated circuit)
  A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
  
   size: 90.3 mm²
• Steppings: C0, D0

"Yonah" (65 nm)

• All models support: MMX, SSE
  Streaming SIMD Extensions
  In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
  
  , SSE2
  SSE2
  SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
  
  , SSE3
  SSE3
  SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
  
  , EIST
  SpeedStep
  SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
  
  , XD bit (an NX bit
  NX bit
  The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
  
   implementation)
• Intel VT-x supported by: all models except T2050, T2250, T2300E, T2350, T2450
• Die
  Die (integrated circuit)
  A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
  
   size: 90.3 mm²
• Steppings: C0, D0

|rowspan=2 |Core Duo T2300 ||SL8VR (C0)
SL9JL (D0) ||rowspan=2 |1667 MHz ||rowspan=2 |2 MiB ||rowspan=2 |667 MT/s ||rowspan=2 |10x ||rowspan=2 |0.762 - 1.3 V ||rowspan=2 |31 W ||Socket M ||rowspan=2 |January 5, 2006 ||LF80539GF0282M ||rowspan=2 |$241
|-
|SL8VV (C0)
SL9JY (D0) ||Socket 479/FC-µBGA

BGA2

The BGA2 is Intel's ball grid array package for their Pentium III and some later Celeron mobile processors. BGA2 is also known as FCBGA-479. It replaced its predecessor, BGA1.-External links:*...

 ||LE80539GF0282M
|-
|rowspan=2 |Core Duo T2300E ||SL9DM (C0)
SL9JE (D0) ||rowspan=2 |1667 MHz ||rowspan=2 |2 MiB ||rowspan=2 |667 MT/s ||rowspan=2 |10x ||rowspan=2 |0.762 - 1.3 V ||rowspan=2 |31 W ||Socket M ||rowspan=2 |May, 2006 ||LF80539GF0282ME ||rowspan=2 |$209
|-
|SL9DN (C0)
SL9JV (D0) ||µFCBGA-479 ||LE80539GF0282ME
|-

|rowspan=2 |Core Duo T2400 ||SL8VQ (C0)
SL9JM (D0) ||rowspan=2 |1833 MHz ||rowspan=2 |2 MiB ||rowspan=2 |667 MT/s ||rowspan=2 |11x ||rowspan=2 |0.762 - 1.3 V || 31 W ||Socket M ||rowspan=2 |January 5, 2006 ||LF80539GF0342M ||rowspan=2 |$294
|-
|SL8VU (C0)
SL9JZ (D0) || 27 W ||Socket 479/FC-µBGA ||LE80539GF0342M
|-

|rowspan=2 |Core Duo T2500 ||SL8VT (C0)
SL9K2 (D0) ||rowspan=2 |2000 MHz ||rowspan=2 |2 MiB ||rowspan=2 |667 MT/s ||rowspan=2 |12x ||rowspan=2 |0.762 - 1.3 V ||rowspan=2 |31 W ||Socket M ||rowspan=2 |January 5, 2006 ||LF80539GF0412M ||rowspan=2 |$423
|-
|SL8VP (C0)
SL9EH (D0) ||Socket 479/FC-µBGA ||LE80539GF0412M
|-
|rowspan=2 |Core Duo T2600 ||SL8VN (C0)
SL9JN (D0) ||rowspan=2 |2167 MHz ||rowspan=2 |2 MiB ||rowspan=2 |667 MT/s ||rowspan=2 |13x ||rowspan=2 |0.762 - 1.3 V ||rowspan=2 |31 W ||Socket M ||rowspan=2 |January 5, 2006 ||LF80539GF0482M ||rowspan=2 |$637
|-
|SL8VS (C0)
SL9K3 (D0) ||Socket 479/FC-µBGA ||LE80539GF0482M
|-

See also

• Intel Core
  Intel Core
  Yonah was the code name for Intel's first generation of 65 nm process mobile microprocessors, based on the Banias/Dothan-core Pentium M microarchitecture. SIMD performance has been improved through the addition of SSE3 instructions and improvements to SSE and SSE2 implementations, while integer...
  
  
• Comparison of Intel processors
  Comparison of Intel processors
  - See also :*Intel Corporation*List of Intel microprocessors*List of Intel Pentium microprocessors*List of future Intel microprocessors*List of Intel CPU microarchitectures*List of AMD microprocessors*List of AMD CPU microarchitectures...
  
  
• List of Intel Core 2 microprocessors
• List of Intel Pentium Dual-Core microprocessors

External links

• Intel Core Duo Processor and Core Solo Processor on 65 nm Process Datasheet
• Intel Core Duo Processor and Core Solo Processor on 65 nm Process Specification Update