R4200
Encyclopedia
The R4200 is a microprocessor
designed by MIPS Technologies, Inc.
(MTI) that implemented the MIPS III instruction set architecture (ISA). It was also known as the VRX during development. The microprocessor was licensed to NEC
, and the company fabricated and marketed it as the VR4200. The first VR4200, an 80 MHz part, was introduced in 1993. A faster 100 MHz part became available in 1994. The R4200 was developed specifically for low-power Windows NT
computers such as personal computers and laptops. MTI claimed the microprocessor's integer performance was greater than that of a high-end Intel i486 and 80% of a P5-variant Pentium microprocessor. The R4200 ultimately did not see any use in personal computers and was repositioned as an embedded microprocessor that competed with the R4600
. The R4300i variant was used in the widely popular Nintendo 64
video game console
.
design with a five-stage classic RISC pipeline
. A notable feature is the use of the integer datapath
for performing arithmetic operations on the mantissa
portion of a floating point
number. A separate datapath was used for the exponent. This scheme reduced cost by reducing the number of transistors, the size of the chip, and power consumption. It also impacted floating point performance negatively, but the R4200's intended applications did not require high floating point performance.
The R4200 has a 16 KB instruction cache
and an 8 KB data cache. Both caches are direct-mapped. The instruction cache has a 32-byte line size, whereas the data cache has 16-byte line size. The data cache uses the write-back write protocol.
The R4200 has a 32-entry translation lookaside buffer
(TLB) for data, and a 4-entry TLB for instructions. A 33-bit physical address
is supported. The system bus is 64 bits wide and operates at half the internal clock frequency.
The R4200 contained 1.3 million transistors and had an area of 81 mm2. NEC fabricated the R4200 in a 0.6 µm CMOS process with three levels of interconnect. It was packaged in a 179-pin ceramic pin grid array that was compatible with the R4x00PC
and R4600
, or a 208-pin plastic quad flat pack
(PQFP). It used a 3.3 V power supply, dissipating 1.8 W typically and a maximum of 2 W at 80 MHz.
The R4300i differs from the R4200 by featuring an improved integer multiplier with a lower latency and a 32-bit system bus for reduced cost. The chip had an area of 45 mm2 and was fabricated in a 0.35 μm process. It was packaged in a 120-pin PQFP. It uses a 3.3 V power supply and dissipates 1.8 W at 100 MHz and 2.2 W at 133 MHz.
NEC produced two derivatives of the R4300 for the general embedded market, the VR4305 and VR4310, announced on 20 January 1998. The VR4310 was available at 100, 133 or 167 MHz. It was fabricated in a 0.25 μm process and packaged in a 120-pin PQFP.
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
designed by MIPS Technologies, Inc.
MIPS Technologies
MIPS Technologies, Inc. , formerly MIPS Computer Systems, Inc., is most widely known for developing the MIPS architecture and a series of pioneering RISC chips. MIPS provides processor architectures and cores for digital home, networking and mobile applications.MIPS Computer Systems Inc. was...
(MTI) that implemented the MIPS III instruction set architecture (ISA). It was also known as the VRX during development. The microprocessor was licensed to NEC
NEC
, a Japanese multinational IT company, has its headquarters in Minato, Tokyo, Japan. NEC, part of the Sumitomo Group, provides information technology and network solutions to business enterprises, communications services providers and government....
, and the company fabricated and marketed it as the VR4200. The first VR4200, an 80 MHz part, was introduced in 1993. A faster 100 MHz part became available in 1994. The R4200 was developed specifically for low-power Windows NT
Windows NT
Windows NT is a family of operating systems produced by Microsoft, the first version of which was released in July 1993. It was a powerful high-level-language-based, processor-independent, multiprocessing, multiuser operating system with features comparable to Unix. It was intended to complement...
computers such as personal computers and laptops. MTI claimed the microprocessor's integer performance was greater than that of a high-end Intel i486 and 80% of a P5-variant Pentium microprocessor. The R4200 ultimately did not see any use in personal computers and was repositioned as an embedded microprocessor that competed with the R4600
R4600
The R4600, code-named "Orion", is a microprocessor developed by Quantum Effect Design that implemented the MIPS III instruction set architecture . As QED was a design firm that did not fabricate or sell their designs, the R4600 was first licensed to Integrated Device Technology , and later to...
. The R4300i variant was used in the widely popular Nintendo 64
Nintendo 64
The , often referred to as N64, was Nintendo′s third home video game console for the international market. Named for its 64-bit CPU, it was released in June 1996 in Japan, September 1996 in North America, March 1997 in Europe and Australia, September 1997 in France and December 1997 in Brazil...
video game console
Video game console
A video game console is an interactive entertainment computer or customized computer system that produces a video display signal which can be used with a display device to display a video game...
.
Description
The R4200 is a scalarScalar processor
Scalar processors represent the simplest class of computer processors. A scalar processor processes one datum at a time . , a scalar processor is classified as a SISD processor .In a vector processor, by contrast, a single instruction operates simultaneously on multiple data items...
design with a five-stage classic RISC pipeline
Classic RISC pipeline
In the history of computer hardware, some early reduced instruction set computer central processing units used a very similar architectural solution, now called a classic RISC pipeline. Those CPUs were: MIPS, SPARC, Motorola 88000, and later DLX....
. A notable feature is the use of the integer datapath
Datapath
A datapath is a collection of functional units, such as arithmetic logic units or multipliers, that perform data processing operations. Most central processing units consist of a datapath and a control unit, with a large part of the control unit dedicated to regulating the interaction between the...
for performing arithmetic operations on the mantissa
Mantissa
* The mantissa is the significand in a common logarithm or floating-point number.* Metaphorically, it is the part of the self that eludes conscious awareness or self-understanding.* An addition of little importance.Mantissa may also refer to:...
portion of a floating point
Floating point
In computing, floating point describes a method of representing real numbers in a way that can support a wide range of values. Numbers are, in general, represented approximately to a fixed number of significant digits and scaled using an exponent. The base for the scaling is normally 2, 10 or 16...
number. A separate datapath was used for the exponent. This scheme reduced cost by reducing the number of transistors, the size of the chip, and power consumption. It also impacted floating point performance negatively, but the R4200's intended applications did not require high floating point performance.
The R4200 has a 16 KB instruction cache
CPU cache
A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations...
and an 8 KB data cache. Both caches are direct-mapped. The instruction cache has a 32-byte line size, whereas the data cache has 16-byte line size. The data cache uses the write-back write protocol.
The R4200 has a 32-entry translation lookaside buffer
Translation Lookaside Buffer
A translation lookaside buffer is a CPU cache that memory management hardware uses to improve virtual address translation speed. All current desktop and server processors use a TLB to map virtual and physical address spaces, and it is ubiquitous in any hardware which utilizes virtual memory.The...
(TLB) for data, and a 4-entry TLB for instructions. A 33-bit physical address
Physical address
In computing, a physical address, also real address, or binary address, is the memory address that is represented in the form of a binary number on the address bus circuitry in order to enable the data bus to access a particular storage cell of main memory.In a computer with virtual memory, the...
is supported. The system bus is 64 bits wide and operates at half the internal clock frequency.
The R4200 contained 1.3 million transistors and had an area of 81 mm2. NEC fabricated the R4200 in a 0.6 µm CMOS process with three levels of interconnect. It was packaged in a 179-pin ceramic pin grid array that was compatible with the R4x00PC
R4000
The R4000 is a microprocessor developed by MIPS Computer Systems that implemented the MIPS III instruction set architecture . Officially announced on 1 October 1991, it was one of the first 64-bit microprocessors and the first MIPS III implementation...
and R4600
R4600
The R4600, code-named "Orion", is a microprocessor developed by Quantum Effect Design that implemented the MIPS III instruction set architecture . As QED was a design firm that did not fabricate or sell their designs, the R4600 was first licensed to Integrated Device Technology , and later to...
, or a 208-pin plastic quad flat pack
PQFP
PQFP, or plastic quad flat pack, is a type of IC packaging. PQFP is a special case of QFP, as is the thinner TQFP package.PQFP packages can vary in thickness from 2.0 mm to 3.8 mm.-References:*...
(PQFP). It used a 3.3 V power supply, dissipating 1.8 W typically and a maximum of 2 W at 80 MHz.
R4300i
The R4300i is a derivative of the R4200 designed by MTI for embedded applications announced on 17 April 1995. The R4300i was licensed to NEC and Toshiba, and was marketed by those companies as the VR4300 or TX4300, respectively. Both companies offered 100 and 133 MHz versions. A derivative of the VR4300 was developed by NEC for the Nintendo 64 game console. This singular use of a MIPS implementation produced significant royalties for MTI, sales for NEC, and made MIPS the highest volume 32/64-bit RISC ISA in 1997.The R4300i differs from the R4200 by featuring an improved integer multiplier with a lower latency and a 32-bit system bus for reduced cost. The chip had an area of 45 mm2 and was fabricated in a 0.35 μm process. It was packaged in a 120-pin PQFP. It uses a 3.3 V power supply and dissipates 1.8 W at 100 MHz and 2.2 W at 133 MHz.
NEC produced two derivatives of the R4300 for the general embedded market, the VR4305 and VR4310, announced on 20 January 1998. The VR4310 was available at 100, 133 or 167 MHz. It was fabricated in a 0.25 μm process and packaged in a 120-pin PQFP.