Ring counter
Encyclopedia
A ring counter is a type of counter composed of a circular shift register
. The output of the last shift register is fed to the input of the first register.
There are two types of ring counters:
Shift register
In digital circuits, a shift register is a cascade of flip flops, sharing the same clock, which has the output of any one but the last flip-flop connected to the "data" input of the next one in the chain, resulting in a circuit that shifts by one position the one-dimensional "bit array" stored in...
. The output of the last shift register is fed to the input of the first register.
There are two types of ring counters:
- A straight ring counter or Overbeck counter connects the output of the last shift register to the first shift register input and circulates a single one (or zero) bit around the ring. For example, in a 4-register one-hot counter, with initial register values of 1000, the repeating pattern is: 1000, 0100, 0010, 0001, 1000... . Note that one of the registers must be pre-loaded with a 1 (or 0) in order to operate properly.
- A twisted ring counter, also called Johnson counter or Möbius counter (also Moebius), connects the complement of the output of the last shift register to its input and circulates a stream of ones followed by zeros around the ring. For example, in a 4-register counter, with initial register values of 0000, the repeating pattern is: 0000, 1000, 1100, 1110, 1111, 0111, 0011, 0001, 0000... .
Four-bit ring counter sequences
Straight ring/Overbeck counter | Twisted ring/Johnson counter | |||||||||
---|---|---|---|---|---|---|---|---|---|---|
State | Q0 | Q1 | Q2 | Q3 | |State | Q0 | Q1 | Q2 | Q3 | |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | |
1 | 0 | 1 | 0 | 0 | 1 | 1 | 0 | 0 | 0 | |
2 | 0 | 0 | 1 | 0 | 2 | 1 | 1 | 0 | 0 | |
3 | 0 | 0 | 0 | 1 | 3 | 1 | 1 | 1 | 0 | |
0 | 1 | 0 | 0 | 0 | 4 | 1 | 1 | 1 | 1 | |
1 | 0 | 1 | 0 | 0 | 5 | 0 | 1 | 1 | 1 | |
2 | 0 | 0 | 1 | 0 | 6 | 0 | 0 | 1 | 1 | |
3 | 0 | 0 | 0 | 1 | 7 | 0 | 0 | 0 | 1 | |
0 | 1 | 0 | 0 | 0 | 0 | 0 | 0 | 0 | 0 |