SWAR
Encyclopedia
SWAR is an acronym for SIMD Within A Register.
SIMD
, in turn, stands for Single Instruction, Multiple Data.
Many modern general-purpose computer processors have some provisions for SIMD
, in the form of a group of registers and instructions to make use of them. SWAR refers to the use of those registers and instructions, as opposed to using specialized processing engines designed to be better at SIMD operations. It also refers to the use of SIMD with general-purpose registers and instructions that are not designed for it, by way of various software tricks.
The acronym "SWAR" was coined by Hank Dietz and Randy Fisher one day in Hank's office in the MSEE building at Purdue University.
SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
, in turn, stands for Single Instruction, Multiple Data.
Many modern general-purpose computer processors have some provisions for SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...
, in the form of a group of registers and instructions to make use of them. SWAR refers to the use of those registers and instructions, as opposed to using specialized processing engines designed to be better at SIMD operations. It also refers to the use of SIMD with general-purpose registers and instructions that are not designed for it, by way of various software tricks.
The acronym "SWAR" was coined by Hank Dietz and Randy Fisher one day in Hank's office in the MSEE building at Purdue University.
See also
- The Aggregate (or http://dynamo.ecn.purdue.edu/~hankd/SWAR/)
- SIMD engines: vector processorVector processorA vector processor, or array processor, is a central processing unit that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors. This is in contrast to a scalar processor, whose instructions operate on single data items...
, array processor, digital signal processorDigital signal processorA digital signal processor is a specialized microprocessor with an architecture optimized for the fast operational needs of digital signal processing.-Typical characteristics:...
, stream processorStream processorThere are multiple articles regarding stream processor:*Stream processing - a technique used to accelerate the processing of many types of video and image computations....
. - SWAR on x86 processors: MMX, 3DNow!3DNow!3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices . It adds single instruction multiple data instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...
, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...