Sandy Bridge (microarchitecture)
Encyclopedia
Sandy Bridge is the codename for a microarchitecture
Microarchitecture
In computer engineering, microarchitecture , also called computer organization, is the way a given instruction set architecture is implemented on a processor. A given ISA may be implemented with different microarchitectures. Implementations might vary due to different goals of a given design or...

 developed by Intel  beginning in 2005 for central processing unit
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...

s in computers to replace the Nehalem microarchitecture. It was designed for the full range of applications from mobile devices, laptop and desktop computers, to large enterprise servers.
Intel demonstrated a Sandy Bridge processor in 2009, and released first products in January 2011 based on the architecture.

Originally, implementations targeted a 32 nanometer
32 nanometer
The 32 nm process is the step following the 45 nanometer process in CMOS semiconductor device fabrication. 32 nanometer refers to the average half-pitch of a memory cell at this technology level...

 manufacturing process based on planar double-gate transistors. Subsequent products, codenamed Ivy Bridge, use a 22 nanometer
22 nanometer
The 22 nanometer node is the CMOS process step following 32 nm. It was introduced by semiconductor companies in 2011. The typical half-pitch for a memory cell is around 22 nm...

 process. The Ivy Bridge die shrink
Die shrink
The term "die shrink" refers to a simple semiconductor scaling of semiconductor devices, mainly transistors. The act of shrinking a die is to create a somewhat identical circuitry using a more advanced fabrication process, usually involving an advance of lithographic node...

, known in the Intel Tick-Tock
Intel Tick-Tock
"Tick-Tock" is a model, of Jones Farm 5 and adopted by chip manufacturer Intel Corporation since 2007 to follow every microarchitectural change with shrinking of the process technology. Every "tick" is a shrinking of process technology of the previous microarchitecture and every "tock" is a new...

 model as the "tick", is based on 3D tri-gate transistors. Intel demonstrated Ivy Bridge processors in 2011.

Technology

Developed primarily in Israel
Israel
The State of Israel is a parliamentary republic located in the Middle East, along the eastern shore of the Mediterranean Sea...

, the codename was originally "Gesher" (meaning "bridge" in Hebrew).
The name was changed to avoid being associated with the defunct Gesher political party,
the decision was led by Ron Friedman, vice president of Intel managing the group at the time.
Intel demonstrated a Sandy Bridge processor with A1 stepping
Stepping level
The term stepping level in the context of CPU architecture or integrated circuitry is a version number.Stepping level refers to the introduction or revision of the lithographic mask or masks within the set of plates that generate the pattern that produces the CPU or integrated circuit...

 at 2 GHz during the Intel Developer Forum
Intel Developer Forum
Intel Developer Forum , is a gathering of technologists to discuss Intel products and products based around Intel products. The first IDF was in 1997...

 in September 2009.

Upgraded features from Nehalem include:
  • 32 kB data + 32 kB instruction L1 cache (3 clocks) and 256 kB L2 cache (8 clocks) per core
  • Shared L3 cache includes the processor graphics (LGA 1155
    LGA 1155
    LGA 1155, also called Socket H2, is an Intel microprocessor compatible socket which supports Intel Sandy Bridge and the up-coming Ivy Bridge microprocessors....

    )
  • 64-byte cache
    Cache
    In computer engineering, a cache is a component that transparently stores data so that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere...

     line size
  • Two load/store operations per CPU cycle for each memory channel
  • Decoded micro-operation cache and enlarged, optimized branch predictor
    Branch predictor
    In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the branch predictor is to improve the flow in the instruction pipeline...

  • Improved performance for transcendental mathematics
    Transcendental function
    A transcendental function is a function that does not satisfy a polynomial equation whose coefficients are themselves polynomials, in contrast to an algebraic function, which does satisfy such an equation...

    , AES encryption, and SHA-1 hashing
  • 256-bit/cycle ring bus interconnect between cores, graphics, cache and System Agent Domain
  • Advanced Vector Extensions
    Advanced Vector Extensions
    Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...

     (AVX) 256-bit instruction set with wider vectors, new extensible syntax and rich functionality
  • Intel Quick Sync Video
    Intel Quick Sync Video
    Intel Quick Sync Video is Intel's hardware video encoding and decoding technology, which is integrated into some Intel CPUs. The name "Quick Sync" refers to the use case of quickly transcoding a video from, for example, a DVD or Blu-ray Disk to a format appropriate to, for example, a smartphone...

    , hardware support for video encoding and decoding
  • Up to 8 physical cores/16 logical cores (through Hyper-threading
    Hyper-threading
    Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....

    )

Ivy Bridge

Ivy Bridge is the codename for the 22 nm
22 nanometer
The 22 nanometer node is the CMOS process step following 32 nm. It was introduced by semiconductor companies in 2011. The typical half-pitch for a memory cell is around 22 nm...

 die shrink
Die shrink
The term "die shrink" refers to a simple semiconductor scaling of semiconductor devices, mainly transistors. The act of shrinking a die is to create a somewhat identical circuitry using a more advanced fabrication process, usually involving an advance of lithographic node...

 of Sandy Bridge plans for retail sale in 2012. Ivy Bridge processors will be backwards-compatible with the Sandy Bridge platform, but require a BIOS
BIOS
In IBM PC compatible computers, the basic input/output system , also known as the System BIOS or ROM BIOS , is a de facto standard defining a firmware interface....

/firmware update.
Intel also plans a new 7-series Panther Point chipset with Ivy Bridge that will come with integrated USB 3.0
USB 3.0
USB 3.0 is the second major revision of the Universal Serial Bus standard for computer connectivity.USB 3.0 has transmission speeds of up to 5 Gbit/s, which is 10 times faster than USB 2.0 . USB 3.0 significantly reduces the time required for data transmission, reduces power consumption, and...

.

Ivy Bridge feature improvements from Sandy Bridge were expected to include:
  • Tri-gate transistor technology (up to 50% less power consumption).
  • PCI Express 3.0 support.
  • Max CPU multiplier of 63 (57 for Sandy Bridge).
  • RAM support up to 2800MT/s in 200MHz increments.
  • Intel HD Graphics
    Intel HD Graphics
    Intel HD Graphics is a series of Intel integrated graphics processors built into computer processors.-History:Previous to HD Graphics, Intel integrated graphics were built into the motherboard's northbridge. This included Intel Extreme Graphics and the Intel Graphics Media Accelerator...

     with DirectX 11, OpenGL 3.1
    OpenGL
    OpenGL is a standard specification defining a cross-language, cross-platform API for writing applications that produce 2D and 3D computer graphics. The interface consists of over 250 different function calls which can be used to draw complex three-dimensional scenes from simple primitives. OpenGL...

    , and OpenCL 1.1
    OpenCL
    OpenCL is a framework for writing programs that execute across heterogeneous platforms consisting of CPUs, GPUs, and other processors. OpenCL includes a language for writing kernels , plus APIs that are used to define and then control the platforms...

     support.
  • The built-in GPU is believed to have up to 16 execution units (EUs), compared to Sandy Bridge's maximum of 12.
  • The new random number generator and the RdRand
    RdRand
    RdRand is an instruction for returning random numbers from an on-chip random number generator that will be available in Ivy Bridge processors. It is part of the Intel 64 instruction set architecture...

     instruction, which is codenamed Bull Mountain.
  • Intel Quick Sync Video
    Intel Quick Sync Video
    Intel Quick Sync Video is Intel's hardware video encoding and decoding technology, which is integrated into some Intel CPUs. The name "Quick Sync" refers to the use case of quickly transcoding a video from, for example, a DVD or Blu-ray Disk to a format appropriate to, for example, a smartphone...

    .
  • DDR3L low voltage for mobile processors.
  • Multiple 4k
    4K resolution
    4K is an emerging standard for resolution in digital film and computer graphics. The name comes from its approximately 4,000 pixels of horizontal resolution. The fact that it describes the horizontal resolution is contrary to the standard resolutions 720p and 1080p, which represent the number of...

    video playback.
The source of this article is wikipedia, the free encyclopedia.  The text of this article is licensed under the GFDL.
 
x
OK