C++ is a statically typed, free-form, multi-paradigm, compiled, general-purpose programming language. It is regarded as an intermediate-level language, as it comprises a combination of both high-level and low-level language features. It was developed by Bjarne Stroustrup starting in 1979 at Bell...
Event driven may refer to:The term event-driven refers to a methodology that focuses on events and event dependencies.Examples include:* Event-driven finite-state machine, finite-state machine where the transition from one state to another is triggered by an event or a message* Event-driven...
C++ is a statically typed, free-form, multi-paradigm, compiled, general-purpose programming language. It is regarded as an intermediate-level language, as it comprises a combination of both high-level and low-level language features. It was developed by Bjarne Stroustrup starting in 1979 at Bell...
In discrete-event simulation, the operation of a system is represented as a chronological sequence of events. Each event occurs at an instant in time and marks a change of state in the system...
). These facilities enable a designer to simulate concurrent processes, each described using plain C++
C++
C++ is a statically typed, free-form, multi-paradigm, compiled, general-purpose programming language. It is regarded as an intermediate-level language, as it comprises a combination of both high-level and low-level language features. It was developed by Bjarne Stroustrup starting in 1979 at Bell...
In linguistics, syntax is the study of the principles and rules for constructing phrases and sentences in natural languages....
. SystemC processes can communicate in a simulated real-time environment, using signals of all the datatypes offered by C++, some additional ones offered by the SystemC library, as well as user defined. In certain respects, SystemC deliberately mimics the hardware description language
Hardware description language
In electronics, a hardware description language or HDL is any language from a class of computer languages, specification languages, or modeling languages for formal description and design of electronic circuits, and most-commonly, digital logic...
In the semiconductor and electronic design industry, Verilog is a hardware description language used to model electronic systems. Verilog HDL, not to be confused with VHDL , is most commonly used in the design, verification, and implementation of digital logic chips at the register-transfer level...
, but is more aptly described as a system-level modeling language.
Scientific modelling is the process of generating abstract, conceptual, graphical and/or mathematical models. Science offers a growing collection of methods, techniques and theory about all kinds of specialized scientific modelling...
Functional verification, in electronic design automation, is the task of verifying that the logic design conforms to specification. In everyday terms, functional verification attempts to answer the question "Does this proposed design do what is intended?" This is a complex task, and takes the...
High-level synthesis , sometimes referred to as C synthesis, electronic system level synthesis, algorithmic synthesis, or behavioral synthesis, is an automated design process that interprets an algorithmic description of a desired behavior and creates hardware that implements that behavior. The...
Electronic system level design and verification is an emerging electronic design methodology that focuses on the higher abstraction level concerns first and foremost. The term Electronic System Level or ESL Design was first defined by Gartner Dataquest, a EDA-industry-analysis firm, on February...
Transaction-level modeling is a high-level approach to modeling digital systems where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture. Communication mechanisms such as busesor FIFOs are modeled as...
(TLM).
SystemC is defined and promoted by OSCI, the Open SystemC Initiative, and has been approved by the IEEE Standards Association as IEEE 1666-2005, the SystemC Language Reference Manual (LRM). The LRM provides the definitive statement of the semantics of SystemC. OSCI also provide an open-source proof-of-concept simulator (sometimes incorrectly referred to as the reference simulator), which can be downloaded from the OSCI website. Although it was the intent of OSCI that commercial vendors and academia could create original software compliant to IEEE 1666, in practice most SystemC implementations have been at least partly based on the OSCI proof-of-concept simulator.
SystemC has semantic similarities to VHDL and Verilog
Verilog
In the semiconductor and electronic design industry, Verilog is a hardware description language used to model electronic systems. Verilog HDL, not to be confused with VHDL , is most commonly used in the design, verification, and implementation of digital logic chips at the register-transfer level...
In electronics, a hardware description language or HDL is any language from a class of computer languages, specification languages, or modeling languages for formal description and design of electronic circuits, and most-commonly, digital logic...
Object-oriented programming is a programming paradigm using "objects" – data structures consisting of data fields and methods together with their interactions – to design applications and computer programs. Programming techniques may include features such as data abstraction,...
and template classes. Although strictly a C++ class library, SystemC is sometimes viewed as being a language in its own right. Source code can be compiled with the SystemC library (which includes a simulation kernel) to give an executable. The performance of the OSCI open-source implementation is typically less optimal than commercial VHDL/Verilog simulators when used for register transfer level
Register transfer level
In integrated circuit design, register-transfer level is a level of abstraction used in describing the operation of a synchronous digital circuit...
In electronics, a hardware description language or HDL is any language from a class of computer languages, specification languages, or modeling languages for formal description and design of electronic circuits, and most-commonly, digital logic...
features such as structural hierarchy and connectivity, clock cycle accuracy, delta cycles, 4-state logic (0, 1, X, Z), and bus resolution functions. From version 2 onward, the focus of SystemC has moved to communication abstraction, transaction-level modeling
Transaction-level modeling
Transaction-level modeling is a high-level approach to modeling digital systems where details of communication among modules are separated from the details of the implementation of functional units or of the communication architecture. Communication mechanisms such as busesor FIFOs are modeled as...
, and virtual platform modeling. SystemC version 2 added abstract ports, dynamic processes, and timed event notifications.
History
1999-09-27 Open SystemC Initiative announced
2000-03-01 SystemC V0.91 released
2000-03-28 SystemC V1.0 released
2001-02-01 SystemC V2.0 specification and V1.2 Beta source code released
2003-06-03 SystemC 2.0.1 LRM (language reference manual) released
2005-06-06 SystemC 2.1 LRM and TLM 1.0 transaction-level modeling standard released
2005-12-12 IEEE approves the IEEE 1666–2005 standard for SystemC
2007-04-13 SystemC v2.2 released
2008-06-09 TLM-2.0.0 library released
2009-07-27 TLM-2.0 LRM released, accompanied by TLM-2.0.1 library
2010-03-08 SystemC AMS extensions 1.0 LRM released
2011-11-10 IEEE approves the IEEE 1666–2011 standard for SystemC
SystemC traces its origins to work on Scenic programming language described in a DAC 1997 paper.ScenicDAC1997
ARM Holdings plc is a British multinational semiconductor and software company headquartered in Cambridge. Its largest business is in processors, although it also designs, licenses and sells software development tools under the RealView and KEIL brands, systems and platforms, system-on-a-chip...
CoWare, now part of Synopsys, was a supplier of platform-driven electronic system level design software and services.CoWare was headquartered in San Jose, California, and had offices around the world, major R&D offices in Belgium, Germany and India....
Synopsys, Inc. is one of the largest companies in the Electronic Design Automation industry. Synopsys' first and best-known product is Design Compiler, a logic-synthesis tool. Synopsys offers a wide range of other products used in the design of an application-specific integrated circuit...
and CynApps teamed up to develop SystemC (CynApps later became Forte Design Systems
Forte Design Systems
Forte Design Systems, Inc. Forte is a provider of high-level synthesis software products, also known as ESL synthesis or behavioral synthesis that enable design at a higher level of abstraction. Forte's main product is Cynthesizer....
) to launch it first draft version in 1999. The chief competitor at the time was SpecC another C++ based open source package developed by UC Irvine personnel and some Japanese companies.
In June 2000, a standards group known as the Open SystemC Initiative was formed to provide an industry neutral organization to host SystemC activities and to allow Synopsys' largest competitors, Cadence and Mentor Graphics, democratic representation in SystemC development.
Modules
Modules are the basic building blocks of a SystemC design hierarchy. A SystemC model usually consists of several modules which communicate via ports. The modules can be thought of as a building block of SystemC.
Ports
Ports allow communication from inside a module to the outside (usually to other modules).
Channels
Channels are the communication elements of SystemC. They can be either simple wires or complex communication mechanisms like FIFOs or bus channels.
Elementary channels:
signal
buffer
fifo
mutex
semaphore
Data types
SystemC introduces several data types which support the modeling of hardware.
void do_add // process
{
sum.write(a.read + b.read); //or just sum = a + b
}
SC_CTOR(adder) // constructor
{
SC_METHOD(do_add); // register do_add to kernel
sensitive << a << b; // sensitivity list of do_add
}
};
Power/Energy estimation in SystemC
The Power/Energy estimation can be accomplished in SystemC by means of simulations.
Powersim is a SystemC class library aimed to the calculation of power and energy consumption of hardware described at system level. To this end C++ operators are monitored and different energy models can be used for each SystemC data type.
Simulations with Powersim do not require any change in the application source code.
Cadence Design Systems, Inc is an electronic design automation software and engineering services company, founded in 1988 by the merger of SDA Systems and ECAD, Inc...
CoFluent Design is a supplier of electronic system level modeling and simulation software. CoFluent is headquartered in Nantes, France, and has sales offices in Paris, France, San Jose, California, and Tokyo, Japan.-History:...
CoWare, now part of Synopsys, was a supplier of platform-driven electronic system level design software and services.CoWare was headquartered in San Jose, California, and had offices around the world, major R&D offices in Belgium, Germany and India....
Forte Design Systems, Inc. Forte is a provider of high-level synthesis software products, also known as ESL synthesis or behavioral synthesis that enable design at a higher level of abstraction. Forte's main product is Cynthesizer....
Synopsys, Inc. is one of the largest companies in the Electronic Design Automation industry. Synopsys' first and best-known product is Design Compiler, a logic-synthesis tool. Synopsys offers a wide range of other products used in the design of an application-specific integrated circuit...
Catapult C Synthesis, a commercial electronic design automation product of Mentor Graphics, is a high-level synthesis tool, sometimes called algorithmic synthesis or ESL synthesis...
Mentor Graphics, Inc is a US-based multinational corporation dealing in electronic design automation for electrical engineering and electronics, as of 2004, ranked third in the EDA industry it helped create...
supports SystemC, C++ and C as input, and also generates SystemC for verification.
HIFSuite from EDALab allows SystemC code manipulation like conversion, automatic abstraction, verification and any custom workflow
External links
SystemC.org The website of OSCI, the Open SystemC Initiative
