VAX 9000
Encyclopedia
The VAX 9000, code named Aridus, was a family of high-end minicomputer
s developed and manufactured by Digital Equipment Corporation
(DEC) using processors implementing the VAX
instruction set architecture (ISA). The VAX 9000 was positioned by Digital as its first mainframe
. In reality it was Digital's second mainframe attempt, following their earlier and more successful 36-bit mainframe line (PDP-6
through DECSYSTEM-20
) dating from the mid 1960s through early 1980s.
The VAX 9000 was introduced in October 1989 and faced problems such as the inability to ship large volumes. It was originally designed to be water-cooled using the same plumbing of IBM mainframes and code-named Aquarius, but was redesigned to be air-cooled.
Roughly four dozen systems were delivered before production was discontinued. Most sites ran the VMS
operating system with a few sites choosing Ultrix
. The pedigree of the vectorizing Fortran compiler is not clear.
capable model, the value of "x" (1, 2, 3 or 4) denoting the number of CPUs present. These models supported the vector processor, with one vector processor supported per CPU. A maximal configuration had 512 MB of memory. The number of I/O buses supported varied, with the Model 410 and 420 supporting two XMI, ten CI and eight VAXBI; while the Model 430 and 440 supported four XMI, ten CI and 14 VAXBI.
and supported one, two, three or four CPUs clocked at 62.5 MHz (16 ns cycle time). The system was based around a crossbar switch
in the system control unit (SCU), to which the one to four CPUs, two memory controllers, two input/output
(I/O) controllers and a service processor connected. I/O was provided by four Extended Memory Interconnect (XMI) buses.
(ECL) macrocell
gate array
s which contained the CPU logic. The gate arrays were fabricated in Motorola
's "MOSAIC III" process, a bipolar process with a drawn width of 1.75 micrometres and three layers of interconnect. The MCUs were installed into a CPU planar module, which accommodated 16 MCUs and was 24 by 24 inches (609.6 mm) in size.
with a maximum theoretical performance of 125 MFLOPS. The vector processor was referred to as the V-box, and it was Digital's first ECL implementation of the VAX Vector Architecture. The design of the vector processor began in 1986, two years after development of the VAX 9000 CPU had begun.
The V-box implementation comprised 25 Motorola Macrocell Array III (MCA3) devices spread over three multichip units (MCUs), which resided on the planar module. The V-box was optional and was field-installable. The V-box consisted of six subunits: the vector register unit, the vector add unit, vector multiply unit, vector mask unit, vector address unit and the vector control unit.
The vector register unit, also known as the vector register file, implemented the 16 vector registers defined by the VAX vector architecture. The vector register file was multi-ported and contained three write ports and five read ports. Each register consisted of 64 elements, and each element was 72 bits wide, with 64 bits used to store data and 8 bits used to store parity information.
Minicomputer
A minicomputer is a class of multi-user computers that lies in the middle range of the computing spectrum, in between the largest multi-user systems and the smallest single-user systems...
s developed and manufactured by Digital Equipment Corporation
Digital Equipment Corporation
Digital Equipment Corporation was a major American company in the computer industry and a leading vendor of computer systems, software and peripherals from the 1960s to the 1990s...
(DEC) using processors implementing the VAX
VAX
VAX was an instruction set architecture developed by Digital Equipment Corporation in the mid-1970s. A 32-bit complex instruction set computer ISA, it was designed to extend or replace DEC's various Programmed Data Processor ISAs...
instruction set architecture (ISA). The VAX 9000 was positioned by Digital as its first mainframe
Mainframe computer
Mainframes are powerful computers used primarily by corporate and governmental organizations for critical applications, bulk data processing such as census, industry and consumer statistics, enterprise resource planning, and financial transaction processing.The term originally referred to the...
. In reality it was Digital's second mainframe attempt, following their earlier and more successful 36-bit mainframe line (PDP-6
PDP-6
The PDP-6 was a computer model developed by Digital Equipment Corporation in 1963. It was influential primarily as the prototype for the later PDP-10; the instruction sets of the two machines are almost identical.The PDP-6 was DEC's first "big" machine...
through DECSYSTEM-20
DECSYSTEM-20
The DECSYSTEM-20 was a 36-bit Digital Equipment Corporation PDP-10 mainframe computer running the TOPS-20 operating system.PDP-10 computers running the TOPS-10 operating system were labeled DECsystem-10 as a way of differentiating them from the PDP-11...
) dating from the mid 1960s through early 1980s.
The VAX 9000 was introduced in October 1989 and faced problems such as the inability to ship large volumes. It was originally designed to be water-cooled using the same plumbing of IBM mainframes and code-named Aquarius, but was redesigned to be air-cooled.
Roughly four dozen systems were delivered before production was discontinued. Most sites ran the VMS
VMS
- Communication and transportation :* Voice Mail System, automated telephone messaging* Video Messaging Service , video messaging for 3G handsets* VMS MobiFone, one of the largest mobile phone operators in Vietnam...
operating system with a few sites choosing Ultrix
Ultrix
Ultrix was the brand name of Digital Equipment Corporation's native Unix systems. While ultrix is the Latin word for avenger, the name was chosen solely for its sound.-History:...
. The pedigree of the vectorizing Fortran compiler is not clear.
VAX 9000 Model 110
The VAX 9000 Model 110 was an entry-level model with the same performance as the Model 210 but had a smaller memory capacity and was bundled with less software and services. On 22 February 1991, it was priced from US$920,000, and if fitted with a vector processor, from US$997,000.VAX 9000 Model 210
The VAX 9000 Model 210 was an entry-level model with one CPU that could be upgraded. If a vector processor was present, it was known as the VAX 9000 Model 210VP.VAX 9000 Model 4x0
The VAX 9000 Model 4x0 was a multiprocessorMultiprocessor
Computer system having two or more processing units each sharing main memory and peripherals, in order to simultaneously process programs.Sometimes the term Multiprocessor is confused with the term Multiprocessing....
capable model, the value of "x" (1, 2, 3 or 4) denoting the number of CPUs present. These models supported the vector processor, with one vector processor supported per CPU. A maximal configuration had 512 MB of memory. The number of I/O buses supported varied, with the Model 410 and 420 supporting two XMI, ten CI and eight VAXBI; while the Model 430 and 440 supported four XMI, ten CI and 14 VAXBI.
Description
The VAX 9000 was a multiprocessorMultiprocessor
Computer system having two or more processing units each sharing main memory and peripherals, in order to simultaneously process programs.Sometimes the term Multiprocessor is confused with the term Multiprocessing....
and supported one, two, three or four CPUs clocked at 62.5 MHz (16 ns cycle time). The system was based around a crossbar switch
Crossbar switch
In electronics, a crossbar switch is a switch connecting multiple inputs to multiple outputs in a matrix manner....
in the system control unit (SCU), to which the one to four CPUs, two memory controllers, two input/output
Input/output
In computing, input/output, or I/O, refers to the communication between an information processing system , and the outside world, possibly a human, or another information processing system. Inputs are the signals or data received by the system, and outputs are the signals or data sent from it...
(I/O) controllers and a service processor connected. I/O was provided by four Extended Memory Interconnect (XMI) buses.
Scalar processor
Each CPU was implemented with 13 Multi-Chip Units (MCUs), with each MCU containing several emitter-coupled logicEmitter-coupled logic
In electronics, emitter-coupled logic , is a logic family that achieves high speed by using an overdriven BJT differential amplifier with single-ended input, whose emitter current is limited to avoid the slow saturation region of transistor operation....
(ECL) macrocell
Macrocell
A macrocell is a cell in a mobile phone network that provides radio coverage served by a high power cellular base station . Generally, macrocells provide coverage larger than microcell. The antennas for macrocells are mounted on ground-based masts, rooftops and other existing structures, at a...
gate array
Gate array
A gate array or uncommitted logic array is an approach to the design and manufacture of application-specific integrated circuits...
s which contained the CPU logic. The gate arrays were fabricated in Motorola
Motorola
Motorola, Inc. was an American multinational telecommunications company based in Schaumburg, Illinois, which was eventually divided into two independent public companies, Motorola Mobility and Motorola Solutions on January 4, 2011, after losing $4.3 billion from 2007 to 2009...
's "MOSAIC III" process, a bipolar process with a drawn width of 1.75 micrometres and three layers of interconnect. The MCUs were installed into a CPU planar module, which accommodated 16 MCUs and was 24 by 24 inches (609.6 mm) in size.
Vector processor
The VAX 9000's CPU could be coupled with a vector processorVector processor
A vector processor, or array processor, is a central processing unit that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors. This is in contrast to a scalar processor, whose instructions operate on single data items...
with a maximum theoretical performance of 125 MFLOPS. The vector processor was referred to as the V-box, and it was Digital's first ECL implementation of the VAX Vector Architecture. The design of the vector processor began in 1986, two years after development of the VAX 9000 CPU had begun.
The V-box implementation comprised 25 Motorola Macrocell Array III (MCA3) devices spread over three multichip units (MCUs), which resided on the planar module. The V-box was optional and was field-installable. The V-box consisted of six subunits: the vector register unit, the vector add unit, vector multiply unit, vector mask unit, vector address unit and the vector control unit.
The vector register unit, also known as the vector register file, implemented the 16 vector registers defined by the VAX vector architecture. The vector register file was multi-ported and contained three write ports and five read ports. Each register consisted of 64 elements, and each element was 72 bits wide, with 64 bits used to store data and 8 bits used to store parity information.