XAUI
Encyclopedia
XAUI is a standard for extending the XGMII (10 Gigabit Media Independent Interface) between the MAC
and PHY
layer of 10 Gigabit Ethernet
(10GbE). XAUI is pronounced "zowie", a concatenation of the Roman numeral X, meaning ten, and the initials of "Attachment Unit Interface
".
The XGMII Extender, which is composed of an XGXS at the MAC end, an XGXS at the PHY end and a XAUI between them, is to extend the operational distance of the XGMII and to reduce the number of interface signals. Applications include extending the physical separation possible between MAC and PHY components in a 10 Gigabit Ethernet system distributed across a circuit board.
The following is a list of the major concepts of XGXS and XAUI:
to integrated circuit) interface implemented with traces on a printed circuit board
. Where the XGMII is electrically limited to distances of approximately 7 cm, the XGMII Extender allows distances up to approximately 50 cm.
of the XGMII. The 10 Gbit/s MAC data stream is converted into four lanes at the XGMII (by the Reconciliation Sublayer for transmit or the PHY for receive). The byte stream of each lane is 8b/10b encoded by the XGXS for transmission across the XAUI at a nominal rate of 3.125 GBaud
. The XGXS at the PHY end of the XGMII Extender (PHY XGXS) and the XGXS at the RS end (DTE XGXS) may operate on independent clocks.
transmit and receive data paths. The XGMII Extender is logically composed of two XGXSs interconnected with a XAUI data path in each direction. One XGXS acts as the source to the XAUI data path in the DTE transmit path and as the destination in the receive path. The other XGXS is the destination in the transmit path and source in the receive path. Each XAUI data path is composed of four serial lanes. All specifications for the XGMII Extender are written assuming conversion from XGMII to XAUI and back to XGMII, but other techniques may be employed provided that the result is that the XGMII Extender operates as if all specified conversions had been made. One example of this is the use of the optional XAUI with the 10GBASE-LX4 8b/10b PHY, where the XGXS interfacing to the Reconciliation Sublayer provides the PCS and PMA functionality required by the PHY. An XGXS layer is not required at the PHY end of the XAUI in this case. However, means may still be required to remove jitter introduced on the XAUI in order to meet PHY jitter requirements.
Media Access Control
The media access control data communication protocol sub-layer, also known as the medium access control, is a sublayer of the data link layer specified in the seven-layer OSI model , and in the four-layer TCP/IP model...
and PHY
PHY
PHY is an abbreviation for the physical layer of the OSI model.An instantiation of PHY connects a link layer device to a physical medium such as an optical fiber or copper cable. A PHY device typically includes a Physical Coding Sublayer and a Physical Medium Dependent layer. The PCS encodes and...
layer of 10 Gigabit Ethernet
10 Gigabit Ethernet
The 10 gigabit Ethernet computer networking standard was first published in 2002. It defines a version of Ethernet with a nominal data rate of 10 Gbit/s , ten times faster than gigabit Ethernet.10 gigabit Ethernet defines only full duplex point to point links which are generally connected by...
(10GbE). XAUI is pronounced "zowie", a concatenation of the Roman numeral X, meaning ten, and the initials of "Attachment Unit Interface
Attachment Unit Interface
An Attachment Unit Interface is a 15 pin connection that provides a path between a node's Ethernet interface and the Medium Attachment Unit , sometimes known as a transceiver. It is the part of the IEEE Ethernet standard located between the Media Access Control , and the MAU...
".
The XGMII Extender, which is composed of an XGXS at the MAC end, an XGXS at the PHY end and a XAUI between them, is to extend the operational distance of the XGMII and to reduce the number of interface signals. Applications include extending the physical separation possible between MAC and PHY components in a 10 Gigabit Ethernet system distributed across a circuit board.
Operation
XAUI has the following characteristics:- Simple signal mapping to the XGMII
- Independent transmit and receive data paths
- Four lanes conveying the XGMII 32-bit data and control
- Differential signaling with low voltage swing (1600 mV(p-p))
- Self-timed interface allows jitterJitterJitter is the undesired deviation from true periodicity of an assumed periodic signal in electronics and telecommunications, often in relation to a reference clock source. Jitter may be observed in characteristics such as the frequency of successive pulses, the signal amplitude, or phase of...
control to the PCS - Shared technology with other 10 Gbit/s interfaces
- Shared functionality with other 10 Gbit/s Ethernet blocks
- Utilization of 8b/10b encoding8B/10B encodingIn telecommunications, 8b/10b is a line code that maps 8-bit symbols to 10-bit symbols to achieve DC-balance and bounded disparity, and yet provide enough state changes to allow reasonable clock recovery. This means that the difference between the count of 1s and 0s in a string of at least 20 bits...
The following is a list of the major concepts of XGXS and XAUI:
- The optional XGMII Extender can be inserted between the Reconciliation Sublayer and the PHY (physical layerPhysical layerThe physical layer or layer 1 is the first and lowest layer in the seven-layer OSI model of computer networking. The implementation of this layer is often termed PHY....
) to transparently extend the physical reach of the XGMII and reduce the interface pin count from 72 to 16. - The XGMII is organized into four lanes with each lane conveying a data octet or control character on each edge of the associated clock. The source XGXS converts bytes on an XGMII lane into a self clocked, serial, 8b/10b encoded data stream. Each of the four XGMII lanes is transmitted across one of the four XAUI lanes.
- The source XGXS converts XGMII Idle control characters (interframe) into an 8b/10b code sequence. The destination XGXS recovers clock and data from each XAUI lane and deskews the four XAUI lanes into the single-clock XGMII.
- The destination XGXS adds to or deletes from the interframe as needed for clock rate disparity compensation prior to converting the interframe code sequence back into XGMII Idle control characters.
- The XGXS uses the same code and coding rules as the 10GBASE-X PCS and PMA specified in Clause 48 of the IEEE 802.3 Specification.
- Each of the 4 Receive and Transmit lanes operates at a rate of 3.125 Gbit/s.
- Capabilities have been built into XAUI to overcome the inter-lane signal-skewing problems using a type of automatic de-skewing. Signals can be launched at the transmitter end of a XAUI line without precisely matching the routingRoutingRouting is the process of selecting paths in a network along which to send network traffic. Routing is performed for many kinds of networks, including the telephone network , electronic data networks , and transportation networks...
of the four lanes, and the signals will be automatically de-skewed at the receiver.
Intended Use
The implementation of XAUI as an optional XGMII Extender is primarily intended as a chip-to-chip (integrated circuitIntegrated circuit
An integrated circuit or monolithic integrated circuit is an electronic circuit manufactured by the patterned diffusion of trace elements into the surface of a thin substrate of semiconductor material...
to integrated circuit) interface implemented with traces on a printed circuit board
Printed circuit board
A printed circuit board, or PCB, is used to mechanically support and electrically connect electronic components using conductive pathways, tracks or signal traces etched from copper sheets laminated onto a non-conductive substrate. It is also referred to as printed wiring board or etched wiring...
. Where the XGMII is electrically limited to distances of approximately 7 cm, the XGMII Extender allows distances up to approximately 50 cm.
Rate of operation
The XGMII Extender supports the 10 Gbit/s data rateBit rate
In telecommunications and computing, bit rate is the number of bits that are conveyed or processed per unit of time....
of the XGMII. The 10 Gbit/s MAC data stream is converted into four lanes at the XGMII (by the Reconciliation Sublayer for transmit or the PHY for receive). The byte stream of each lane is 8b/10b encoded by the XGXS for transmission across the XAUI at a nominal rate of 3.125 GBaud
Baud
In telecommunications and electronics, baud is synonymous to symbols per second or pulses per second. It is the unit of symbol rate, also known as baud rate or modulation rate; the number of distinct symbol changes made to the transmission medium per second in a digitally modulated signal or a...
. The XGXS at the PHY end of the XGMII Extender (PHY XGXS) and the XGXS at the RS end (DTE XGXS) may operate on independent clocks.
Allocation of functions
The XGMII Extender is transparent to the Reconciliation Sublayer and PHY device, and operates symmetrically with similar functions on the DTEData terminal equipment
Data Terminal Equipment is an end instrument that converts user information into signals or reconverts received signals. These can also be called tail circuits. A DTE device communicates with the data circuit-terminating equipment...
transmit and receive data paths. The XGMII Extender is logically composed of two XGXSs interconnected with a XAUI data path in each direction. One XGXS acts as the source to the XAUI data path in the DTE transmit path and as the destination in the receive path. The other XGXS is the destination in the transmit path and source in the receive path. Each XAUI data path is composed of four serial lanes. All specifications for the XGMII Extender are written assuming conversion from XGMII to XAUI and back to XGMII, but other techniques may be employed provided that the result is that the XGMII Extender operates as if all specified conversions had been made. One example of this is the use of the optional XAUI with the 10GBASE-LX4 8b/10b PHY, where the XGXS interfacing to the Reconciliation Sublayer provides the PCS and PMA functionality required by the PHY. An XGXS layer is not required at the PHY end of the XAUI in this case. However, means may still be required to remove jitter introduced on the XAUI in order to meet PHY jitter requirements.
See also
- Medium Attachment UnitMedium Attachment UnitA Medium Attachment Unit is a transceiver which converts signals on an Ethernet cable to and from Attachment Unit Interface signals.On original 10BASE5 Ethernet, the MAU was typically clamped to the Ethernet cable...
- Small form-factor pluggable transceiver
- Gigabit interface converter
- List of device bandwidths