BACPAC, or the Berkeley Advanced Chip Performance Calculator, is a software program to explore the effect of changes in IC technology. The use enters a set of fairly fundamental properites of the technology (such as interconnect layer thickness, and logic depth) and the program estimates the system level performance of an IC built with these assumptions. Previous work in this area can be found in [1] and [2], but these do not consider many of the effects of deep-sub-micrometre interconnect. BACPAC is based on the work in [3].

BACPAC uses analytical approximations for system properties such as delay and interconnect requirements. The intent is not absolute accuracy for a given design, but to show trends and effects of technology changes.

Inputs to BACPAC

Interconnect

• Number of routing layers
• Pitches (center to center distance of each layer)
• Resistivity
  Resistivity
  Electrical resistivity is a measure of how strongly a material opposes the flow of electric current. A low resistivity indicates a material that readily allows the movement of electric charge. The SI unit of electrical resistivity is the ohm metre...
  
   of the wires
• Dielectric constant
  Dielectric constant
  The relative permittivity of a material under given conditions reflects the extent to which it concentrates electrostatic lines of flux. In technical terms, it is the ratio of the amount of electrical energy stored in a material by an applied voltage, relative to that stored in a vacuum...
  
   of the insulators between the layers

Device

• V_dd, also called supply voltage
• V_t, also called threshold voltage
  Threshold voltage
  The threshold voltage of a MOSFET is usually defined as the gate voltage where an inversion layer forms at the interface between the insulating layer and the substrate of the transistor. The purpose of the inversion layer's forming is to allow the flow of electrons through the gate-source junction...
  
  
• Gate oxide
  Gate oxide
  The gate oxide is the dielectric layer that separates the gate terminal of a MOSFET from the underlying source and drain terminals as well as the conductive channel that connects source and drain when the transistor is turned on. Gate oxide is formed by oxidizing the silicon of the channel to form...
  
   thickness of the MOS transistors
• Drain current
• Fan-in
  Fan-In
  Fan-in is the number of inputs of an electronic logic gate. For instance the fan-in for the AND gate shown below is 3. Physical logic gates with a large fan-in tend to be slower than those with a small fan-in, because the complexity of the input circuitry increases the input capacitance of the...
  
   (number of inputs for each gate, on the average)

System-level

• Block design size (number of gates in each block)
• Silicon efficiency (depends on design style - custom, ASIC, gate array
  Gate array
  A gate array or uncommitted logic array is an approach to the design and manufacture of application-specific integrated circuits...
  
  , and so on)
• logic depth (number of gates between state elements)
• Rent’s exponent (how the number of connections varies with block size - see Rent's rule
  Rent's Rule
  Rent's rule pertains to the organization of computing logic, specifically the relationship between the number of external signal connections to a logic block with the number of logic gates in the logic block, and has been applied to circuits ranging from small digital circuits to mainframe...
  
  .)

BACPAC outputs

Delay analysis

• Chip area
• Maximum clock frequency - how fast the chip can run
• Optimized device sizes - estimated devices sizes to make it run this fast
• Interconnect RC
• Average wirelength (local & global)
• Ratio of wire delay to gate delay

Noise analysis

• Clock frequency with noise
• Newly optimized device sizes for the clock distribution network
• Ratio of wire delay to gate delay

Wirability analysis

• Wiring capacity
• Wiring requirements (global & local),
• Wiring needs for clock distribution
• Wiring needs for the power distribution network

Power analysis

• Total power consumption, diivided into sub-categories:
  • Clock (power needed to distribute the clock across the chip)
  • I/O (power needed to get needed signals on and off the chip)
  • memory (power needed to retain and access data in the internal memories)
  • global wiring (power dissipated in the global wiring)
  • logic (power dissipated in the logic gates themselves)
  • short-circuit (power wasted inside the gates from pull-up and pull down transistors fighting each other during switching)
  • leakage (power that flows through the gate even when it is not switching)

Yield analysis

• Projected yields for excellent, average, and poor process control using a negative binomial yield mode