Cycle stealing
Encyclopedia
Cycle stealing is used to describe the "stealing" of a single CPU cycle, for example, to allow a DMA
controller to perform a DMA operation. This is opposed to block operation where a DMA controller would request a bus, hold it for a complete transaction (typically 16-32 bytes but could last much longer) before releasing to a CPU.
Cycle stealing generally occurs when the entire DMA
transfer of data is finished, the DMA
controller interrupts the CPU.
, where, for economy reasons, the video RAM
was not dual access
. Consequently, the M68008 was denied access to the memory bus when the ZX8301
was accessing memory, and the machine performed poorly when compared with machines using similar processors at similar speeds.
Cycle stealing was also the cause of errors reported by the Apollo PGNCS
of the Apollo Guidance Computer
.
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
controller to perform a DMA operation. This is opposed to block operation where a DMA controller would request a bus, hold it for a complete transaction (typically 16-32 bytes but could last much longer) before releasing to a CPU.
Cycle stealing generally occurs when the entire DMA
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
transfer of data is finished, the DMA
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
controller interrupts the CPU.
Modern architecture
This term is less common in modern computer architecture (say above 66-100 MHz), where the various external buses and controllers generally run at different rates, and CPU internal operations are no longer closely coupled to I/O bus operations.Examples in actual computer systems
Cycle stealing has been the cause of major performance degradation on machine such as the Sinclair QLSinclair QL
The Sinclair QL , was a personal computer launched by Sinclair Research in 1984, as the successor to the Sinclair ZX Spectrum...
, where, for economy reasons, the video RAM
Ram
-Animals:*Ram, an uncastrated male sheep*Ram cichlid, a species of freshwater fish endemic to Colombia and Venezuela-Military:*Battering ram*Ramming, a military tactic in which one vehicle runs into another...
was not dual access
Dual-ported RAM
Dual-ported RAM is a type of Random Access Memory that allows multiple reads or writes to occur at the same time, or nearly the same time, unlike single-ported RAM which only allows one access at a time....
. Consequently, the M68008 was denied access to the memory bus when the ZX8301
ZX8301
The ZX8301 was a ULA integrated circuit designed for the Sinclair QL microcomputer. Also known as the "Master Chip", it provided a Video Display Generator, the division of a 15 MHz crystal to provide the 7.5 MHz system clock, ZX8302 register address decoder, DRAM refresh and bus controller...
was accessing memory, and the machine performed poorly when compared with machines using similar processors at similar speeds.
Cycle stealing was also the cause of errors reported by the Apollo PGNCS
Apollo PGNCS
The Apollo Primary Guidance, Navigation and Control System was a self-contained inertial guidance system that allowed Apollo spacecraft to carry out their missions when communications with Earth were interrupted, either as expected, when the spacecraft were behind the moon, or in case of a...
of the Apollo Guidance Computer
Apollo Guidance Computer
The Apollo Guidance Computer provided onboard computation and control for guidance, navigation, and control of the Command Module and Lunar Module spacecraft of the Apollo program...
.