IBM RS64
Encyclopedia
The IBM RS64 is a family of microprocessor
s that were used in the late 1990s in IBM's RS/6000
and AS/400 server
s.
These microprocessors implement the "Amazon", or "PowerPC-AS", instruction set architecture (ISA). Amazon is a subset of the PowerPC
instruction set, with the addition of special features not in the PowerPC specification, mainly derived from POWER2 and the original AS/400 processor, and has been 64-bit
from the start. The processors in this family are optimized for commercial workloads (integer performance, large caches, branches) and do not feature the strong floating point
performance of the processors in the IBM POWER
family, its sibling.
The RS64 family was phased out soon after the introduction of the POWER4
, which was developed to unite the RS64 and POWER families.
In 1996 IBM released the high-end, 4-way SMP
, multi-chip version called Muskie, A25 or A30 in AS/400 systems. It ran at 125-154 MHz. It was manufactured on a BiCMOS
fabrication process.
These processors were only used in AS/400 machines.
machines as well as in AS/400 systems. It featured 128 KB
total on-die L1 cache, 4 MB
full speed off-chip L2 on a 128 bit bus, and a clock of 125 MHz. It scaled to a 12 processor SMP configuration in IBM's machines.
RS64 was called A35 in AS/400 and was one time referred to as the PowerPC 625http://www.cbronline.com/article_cg.asp?guid=F5C9A2A8-3F4E-4CE1-ADC1-499264C9066C, between the defunct PowerPC 620 and the PowerPC 630 (later renamed POWER3
).
It was manufactured with a BiCMOS fabrication process.
). Processor boards containing 4 RS64-II's could be swapped into machines designed for similar 4-way RS64 boards, avoiding a "fork lift upgrade". The RS64-II contained 12.5 million transistors, was 162 mm² large and drew 27 Watts maximum power. Manufacturing changed to a 0.35 μm CMOS
fabrication.
RS64-II was the first mass-market processor to implement multithreading
. Essentially, each chip stores state information for 2 threads at any given time and appears to be two processors to the OS. One logical processor runs what is called the foreground thread. When this thread encounters a high latency event (L2 cache miss, etc.) the background thread is switched to, on the second logical processor from the OS's point of view. In the event of a "less long" latency event (L1 miss, etc.), thread switching will only occur if the background thread is ready to execute. If the background thread is also waiting for a miss, thread switching will not occur. IBM calls this scheme "coarse grained multithreading". It is not exactly the same thing as simultaneous multithreading
as found on later Pentium 4
processors. An IBM paper notes that the coarse grained scheme is a better fit for an in-order architecture like RS64.
RS64-II was called A50 in AS/400 systems.
The RS64-III has 34 million transistors, a die size of 140 mm², and is manufactured on the 0.22 μm CMOS 7S process with six levels of copper interconnect.
In 2000, IBM launched a refined version called IStar manufactured with a SOI
fabrication process with copper interconnects, which increased the processor's clock frequency to 600 MHz. This was the first processor implemented in this process. Architecturally however, the IStar was identical to Pulsar.
For a time, while the POWER line stagnated at half the clock speed of its competitors, the RS64 family was at the top of the IBM large SMP UNIX server line. The integer / commercial workload performance of the RS-64 IV was similar to the Sun Microsystems
processors with which it competed, though its floating point power was not comparable to the contemporary POWER3-II
, which remained reasonably competitive throughout its lifecycle.
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
s that were used in the late 1990s in IBM's RS/6000
RS/6000
RISC System/6000, or RS/6000 for short, is a family of RISC and UNIX based servers, workstations and supercomputers made by IBM in the 1990s. The RS/6000 family replaced the IBM RT computer platform in February 1990 and was the first computer line to see the use of IBM's POWER and PowerPC based...
and AS/400 server
Server (computing)
In the context of client-server architecture, a server is a computer program running to serve the requests of other programs, the "clients". Thus, the "server" performs some computational task on behalf of "clients"...
s.
These microprocessors implement the "Amazon", or "PowerPC-AS", instruction set architecture (ISA). Amazon is a subset of the PowerPC
PowerPC
PowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...
instruction set, with the addition of special features not in the PowerPC specification, mainly derived from POWER2 and the original AS/400 processor, and has been 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...
from the start. The processors in this family are optimized for commercial workloads (integer performance, large caches, branches) and do not feature the strong floating point
Floating point
In computing, floating point describes a method of representing real numbers in a way that can support a wide range of values. Numbers are, in general, represented approximately to a fixed number of significant digits and scaled using an exponent. The base for the scaling is normally 2, 10 or 16...
performance of the processors in the IBM POWER
IBM POWER
POWER is a reduced instruction set computer instruction set architecture developed by IBM. The name is an acronym for Performance Optimization With Enhanced RISC....
family, its sibling.
The RS64 family was phased out soon after the introduction of the POWER4
POWER4
The POWER4 is a microprocessor developed by International Business Machines that implemented the 64-bit PowerPC and PowerPC AS instruction set architectures. Released in 2001, the POWER4 succeeded the POWER3 and RS64 microprocessors, and was used in RS/6000 and AS/400 computers, ending a separate...
, which was developed to unite the RS64 and POWER families.
Cobra and Muskie
In 1995 IBM released the Cobra, or A10 processor, the first implementation of PowerPC AS, for AS/400 systems. It was a single-chip processor running at 50-77 MHz. It was designed with a semi-custom methodology, as a consequence of time-to-market constraints. The die contains 4.7 million transistors and measures 14.6 mm by 14.6 mm (213 mm2). It was fabricated by IBM in their CMOS 5L process, a 0.5 µm, four-layer-metal CMOS process. It used a 3.0 V power supply and dissipated 17.7 W maximum, 13.4 W minimum at 77 MHz. It was packaged in a 625-contact ceramic ball grid array (CBGA) that measured 32 mm by 32 mm.In 1996 IBM released the high-end, 4-way SMP
Symmetric multiprocessing
In computing, symmetric multiprocessing involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture...
, multi-chip version called Muskie, A25 or A30 in AS/400 systems. It ran at 125-154 MHz. It was manufactured on a BiCMOS
BiCMOS
BiCMOS is an evolved semiconductor technology that integrates two formerly separate semiconductor technologies - those of the analog bipolar junction transistor and the digital CMOS transistor - in a single integrated circuit device....
fabrication process.
These processors were only used in AS/400 machines.
RS64
The RS64 or Apache was introduced in 1997. It was developed from "Cobra" and "Muskie" but included a more complete PowerPC ISA and was therefore set to be used in RS/6000RS/6000
RISC System/6000, or RS/6000 for short, is a family of RISC and UNIX based servers, workstations and supercomputers made by IBM in the 1990s. The RS/6000 family replaced the IBM RT computer platform in February 1990 and was the first computer line to see the use of IBM's POWER and PowerPC based...
machines as well as in AS/400 systems. It featured 128 KB
Kilobyte
The kilobyte is a multiple of the unit byte for digital information. Although the prefix kilo- means 1000, the term kilobyte and symbol KB have historically been used to refer to either 1024 bytes or 1000 bytes, dependent upon context, in the fields of computer science and information...
total on-die L1 cache, 4 MB
Megabyte
The megabyte is a multiple of the unit byte for digital information storage or transmission with two different values depending on context: bytes generally for computer memory; and one million bytes generally for computer storage. The IEEE Standards Board has decided that "Mega will mean 1 000...
full speed off-chip L2 on a 128 bit bus, and a clock of 125 MHz. It scaled to a 12 processor SMP configuration in IBM's machines.
RS64 was called A35 in AS/400 and was one time referred to as the PowerPC 625http://www.cbronline.com/article_cg.asp?guid=F5C9A2A8-3F4E-4CE1-ADC1-499264C9066C, between the defunct PowerPC 620 and the PowerPC 630 (later renamed POWER3
POWER3
The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P...
).
It was manufactured with a BiCMOS fabrication process.
RS64-II
The RS64-II or Northstar was introduced at 262 MHz in 1998 with 8 MB of full speed L2 on a 256 bit 6XX bus (also used in PowerPC 620 and POWER3POWER3
The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P...
). Processor boards containing 4 RS64-II's could be swapped into machines designed for similar 4-way RS64 boards, avoiding a "fork lift upgrade". The RS64-II contained 12.5 million transistors, was 162 mm² large and drew 27 Watts maximum power. Manufacturing changed to a 0.35 μm CMOS
CMOS
Complementary metal–oxide–semiconductor is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM, and other digital logic circuits...
fabrication.
RS64-II was the first mass-market processor to implement multithreading
Multithreading (computer hardware)
Multithreading computers have hardware support to efficiently execute multiple threads. These are distinguished from multiprocessing systems in that the threads have to share the resources of a single core: the computing units, the CPU caches and the translation lookaside buffer...
. Essentially, each chip stores state information for 2 threads at any given time and appears to be two processors to the OS. One logical processor runs what is called the foreground thread. When this thread encounters a high latency event (L2 cache miss, etc.) the background thread is switched to, on the second logical processor from the OS's point of view. In the event of a "less long" latency event (L1 miss, etc.), thread switching will only occur if the background thread is ready to execute. If the background thread is also waiting for a miss, thread switching will not occur. IBM calls this scheme "coarse grained multithreading". It is not exactly the same thing as simultaneous multithreading
Simultaneous multithreading
Simultaneous multithreading, often abbreviated as SMT, is a technique for improving the overall efficiency of superscalar CPUs with hardware multithreading...
as found on later Pentium 4
Pentium 4
Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
processors. An IBM paper notes that the coarse grained scheme is a better fit for an in-order architecture like RS64.
RS64-II was called A50 in AS/400 systems.
RS64-III
The RS64-III or Pulsar was introduced in 1999 at 450 MHz. Key changes included larger 128 KiB L1 instruction and data caches, improved branch prediction accuracy and reduced branch misprediction penalties of zero or one cycle. The RS64-III has a five stage pipeline and a 256 bit wide L2 cache bus, which provided the processor with 14.4 GB/s of bandwidth from the 8 MiB L2 cache, implemented with 225 MHz DDR SRAMs.The RS64-III has 34 million transistors, a die size of 140 mm², and is manufactured on the 0.22 μm CMOS 7S process with six levels of copper interconnect.
In 2000, IBM launched a refined version called IStar manufactured with a SOI
Silicon on insulator
Silicon on insulator technology refers to the use of a layered silicon-insulator-silicon substrate in place of conventional silicon substrates in semiconductor manufacturing, especially microelectronics, to reduce parasitic device capacitance and thereby improving performance...
fabrication process with copper interconnects, which increased the processor's clock frequency to 600 MHz. This was the first processor implemented in this process. Architecturally however, the IStar was identical to Pulsar.
RS64-IV
The RS64-IV or Sstar was introduced in 2000 at 600 MHz, later increased to 750 MHz. Up to 16 MB DDR L2 was supported in the same manner as the RS64-III (19.2 GB/s bandwidth). The RS64-IV had 44 million transistors and was 128 mm² large manufactured on a 0.18 μm process. Unlike POWER, energy consumption remained low, at under 15 watts per core.For a time, while the POWER line stagnated at half the clock speed of its competitors, the RS64 family was at the top of the IBM large SMP UNIX server line. The integer / commercial workload performance of the RS-64 IV was similar to the Sun Microsystems
Sun Microsystems
Sun Microsystems, Inc. was a company that sold :computers, computer components, :computer software, and :information technology services. Sun was founded on February 24, 1982...
processors with which it competed, though its floating point power was not comparable to the contemporary POWER3-II
POWER3
The POWER3 is a microprocessor, designed and exclusively manufactured by IBM, that implemented the 64-bit version of the PowerPC instruction set architecture , including all of the optional instructions of the ISA such as the POWER2. It was introduced on 5 October 1998, debuting in the RS/6000 43P...
, which remained reasonably competitive throughout its lifecycle.
Further reading
- Gwennap, Linley (31 July 1995). "IBM Creates PowerPC Processors for AS/400". Microprocessor Report.
External links
- IBM paper on RS64-IV
- 27 years of IBM RISC
- When Is PowerPC Not PowerPC? - History of the POWER Architecture by Frank SoltisFrank SoltisFrank Gerald Soltis , an American computer scientist, was IBM's Chief Scientist for the System i computers. Based on his Ph.D. research, his pioneering architecture of technology-independent machine interface and single-level store has appeared in these eight generations of IBM hardware: ...
- POWER to the people
- 4th Generation 64-bit PowerPC-Compatible Commercial Processor Design