Konami SCC
Encyclopedia
The Konami SCC is a custom sound chip that was developed by Konami
with Yamaha. It is one of several sound/memory management chips Konami developed in-house that ended up in use in home computer and video game systems from the late 1980s into the 1990s until the fourth generation
systems were prolific.
home computer. Its standard sound chip was a tone generating PSG, capable of 3 channels of square wave tones. As the computer used cartridges to run software such as video games, Konami placed the SCC chip onto the same board as the ROM inside the cartridge they produced. This added 5 more channels and they could be used in conjunction with the sounds of the PSG as well. Moreover, these channels had programmable waveforms so it expanded the tonal palette of the MSX.
Konami also found use for the chip in arcade boards of the time period as well, such as the Konami GX400
. The game City Bomber
and others ran on this system.
Though 32 bytes at most resolutions does not represent a complicated sample, such as a guitar recording, the 32 bytes were usually used to construct synthetic instruments with waveforms far more complex than what the PSG tone generators could produce.
It also had a memory mapper built in, so the cartridges only needed this chip and the actual ROM
. Nearly all of the later MSX titles (from 1987 onwards) used this chip, including Gradius 2
, Metal Gear 2
.
A slightly improved version called the Sound Cartridge
is used for Snatcher
and SD Snatcher
, which has 64kB of RAM on-board.
The SCC is accessed through memory-mapped I/O. First 3Fh (the two high bits are unimportant, so FFh is fine too) must be written to somewhere between 9000h and 97FFh. Now the SCC is active (you can read and write) at 9800h to 9FFFh.
The waveform is made up of 32, signed (two's complement) bytes. The waveform represents the actual form of the tone the sound chip produces. It's played back from byte 0 to 31 and then again from the start.
The frequency is stored the same way as in the PSG. It is a 12-bit value. The first byte contains bits 0 to 7 from the frequency and bits 0 to 3 of the second byte contain bits 8 to 11 of the frequency. Bits 4 to 7 of the second byte are ignored. Remember that the value you enter is really a period: a higher value gives a lower frequency.
The formula for calculating the frequency of the tone is almost the same than for the PSG:
is the clock of the computer (always 3,579,545Hz on an MSX) and P is the 12 bits period set in the frequency register.
The volume is stored in the same way as in the MSX PSG, though it does not support envelopes. Bits 0 to 3 contain a volume of 0 to 15, and bits 7 to 4 are ignored. A volume of 0 is silent, and a volume of 15 is maximum volume.
Note: SCC volume is linear while the MSX PSG (usually the AY8910) has logarithmic levels according to (execept for n=0 that gives no output).
The on/off switch register switches the different channels on or off. Set bit 0 to activate channel 1, bit 1 for channel 2, and so on to bit 4 for channel 5. Bits 5 through 7 are ignored.
game. All the addresses in the memory area (98E0h - 98FFh) refer to the same register. Resetting the SCC will set this register to 0.
The bits are RRB000XX with the following meaning:
XX: Freq multiplier
00 = *1
01 = *256
10 = *16
11 = *16
The lower two bits (XX) influence the frequency.
If set to 01b, all frequencies are multiplied by 256.
If set to 11b or 10b, all frequencies are multiplied by 16.
(This affects both freq of voice and rotation speed.)
B: Reset if freq is written
0 = Normal
1 = Start from beginning of sample when freq changes
If bit 5 is set, waveform playback is started from the beginning when a frequency register is written to.
(This can be also used to implement sub-sample phase differences and among channels)
RR: Rotation
00 = Normal, No rotation
01 = Rotate all waveforms with channel own freq. CH4 & CH5 common waveform will be rotated with CH5 freq.
10 = Rotate only CH4 & CH5 common waveform. Waveform will be rotated with CH4 freq.
11 = as 10, but to be verified by HW tests.
Channels that are rotating are READ ONLY. Writing will have no effect.
Rotating speed is same as reading speed of sample from memory.
This means that it is easy to use CH4 & CH5 common waveform as time counter for sample in other channel.
Note anyway, that reading too actively may cause noise as SCC can't read the memory at the same time.
Reading from this register will return FFh, but will set bit 6 of the register.
Since the waves start to rotate now, the values in 9800h through 987Fh will change each time you read them.
The memory area from 9900h to 99FFh has exactly the same function as from 9800h to 98FFh, 9900h through 99FFh and so on to 9F00h through 9FFFh. This happens because the SCC chip is not connected to address lines A8 through A10, so it cannot distinguish these ranges.
Konami
is a Japanese leading developer and publisher of numerous popular and strong-selling toys, trading cards, anime, tokusatsu, slot machines, arcade cabinets and video games...
with Yamaha. It is one of several sound/memory management chips Konami developed in-house that ended up in use in home computer and video game systems from the late 1980s into the 1990s until the fourth generation
History of video game consoles (fourth generation)
In the history of computer and video games, the fourth generation began on October 30, 1987 with the Japanese release of Nippon Electric Company's PC Engine...
systems were prolific.
Uses
The chip was used to expand the sound capabilities of the MSXMSX
MSX was the name of a standardized home computer architecture in the 1980s conceived by Kazuhiko Nishi, then Vice-president at Microsoft Japan and Director at ASCII Corporation...
home computer. Its standard sound chip was a tone generating PSG, capable of 3 channels of square wave tones. As the computer used cartridges to run software such as video games, Konami placed the SCC chip onto the same board as the ROM inside the cartridge they produced. This added 5 more channels and they could be used in conjunction with the sounds of the PSG as well. Moreover, these channels had programmable waveforms so it expanded the tonal palette of the MSX.
Konami also found use for the chip in arcade boards of the time period as well, such as the Konami GX400
Konami GX400
-Nemesis specifications:*Main CPU: Motorola 68000 @ 9.216 MHz*Sound CPU: Zilog Z80*Sound Chip: 2x AY-3-8910 PSG or YM2151, VLM5030 and K007232-List of Konami GX400 games:*Black Panther *City Bomber *Galactic Warriors...
. The game City Bomber
City Bomber
City Bomber is a vehicular combat arcade game developed and distributed by Konami and first released in 1987.-Gameplay:In City Bomber, the player is in pursuit of a gang of criminals. In order to keep the criminals from escaping, the player must reach checkpoints within a specified amount of time...
and others ran on this system.
Physical Description
On each SCC the following is printed: KONAMI 051649 2212P003 JAPAN, followed by a fabrication location/date number, like 8750AAA. The first two digits are the year, followed by the week. The letters after that are some location/lot code.Capabilities
Unlike the PSG which was a tone-generating chip, the SCC is a simple wavetable sound chip. The chip has 128 bytes of memory built in, combined from 4 wave samples of 32 bytes each. Each of 3 channels gets its own sample, and channels 4 and 5 share a sample. Each channel can be controlled by an on/off bit, volume, and frequency.Though 32 bytes at most resolutions does not represent a complicated sample, such as a guitar recording, the 32 bytes were usually used to construct synthetic instruments with waveforms far more complex than what the PSG tone generators could produce.
It also had a memory mapper built in, so the cartridges only needed this chip and the actual ROM
Read-only memory
Read-only memory is a class of storage medium used in computers and other electronic devices. Data stored in ROM cannot be modified, or can be modified only slowly or with difficulty, so it is mainly used to distribute firmware .In its strictest sense, ROM refers only...
. Nearly all of the later MSX titles (from 1987 onwards) used this chip, including Gradius 2
Gradius
The Gradius games, first introduced in 1985, make up a series of scrolling shooter video games published by Konami for a variety of portable, console and arcade platforms. In many games in the series, the player controls a ship known as the Vic Viper...
, Metal Gear 2
Metal Gear 2: Solid Snake
is an overhead stealth action game that was originally released by Konami in for the MSX2 computer standard exclusively in Japan. Metal Gear 2 was directed and written by Hideo Kojima, who also designed the MSX2 version of the original Metal Gear...
.
A slightly improved version called the Sound Cartridge
Konami Sound Cartridge
The Konami Sound Cartridge is supplied with the MSXvideo games Snatcher and SD Snatcher. Sometimes it is known as the SCC+. It includes a slightly improved Konami SCC sound chip and 64kB of volatile RAM...
is used for Snatcher
Snatcher
is a cyberpunk-themed graphic adventure game produced by Konami, originally released in Japan for the NEC PC-8801 and MSX 2 computer platforms in 1988. It was followed by a CD-ROM-based remake released for the PC Engine video game console in 1992, which was subsequently ported and localized into...
and SD Snatcher
SD Snatcher
SD Snatcher is a role-playing video game by Konami for the MSX2 computer platform in exclusively in Japan. It is a spinoff of the original Snatcher, adapting the same storyline into a different genre...
, which has 64kB of RAM on-board.
Programming the SCC
What follows here is a technical description of how the chip works. Official documentation was never released to the public so all of this is reverse-engineered.The SCC is accessed through memory-mapped I/O. First 3Fh (the two high bits are unimportant, so FFh is fine too) must be written to somewhere between 9000h and 97FFh. Now the SCC is active (you can read and write) at 9800h to 9FFFh.
Address | read/write | Function |
---|---|---|
9800h - 981Fh | rw | waveform channel 1 |
9820h - 983Fh | rw | waveform channel 2 |
9840h - 985Fh | rw | waveform channel 3 |
9860h - 987Fh | rw | waveform channel 4 and 5 |
9880h - 9881h | w | frequency channel 1 |
9882h - 9883h | w | frequency channel 2 |
9884h - 9885h | w | frequency channel 3 |
9886h - 9887h | w | frequency channel 4 |
9888h - 9889h | w | frequency channel 5 |
988Ah | w | volume channel 1 |
988Bh | w | volume channel 2 |
988Ch | w | volume channel 3 |
988Dh | w | volume channel 4 |
988Eh | w | volume channel 5 |
988Fh | w | on/off switch channel 1 to 5 |
9890h - 989Fh | same as 9880h to 988Fh | |
98A0h - 98DFh | no function | |
98E0h - 98FFh | rw | deformation register |
The waveform is made up of 32, signed (two's complement) bytes. The waveform represents the actual form of the tone the sound chip produces. It's played back from byte 0 to 31 and then again from the start.
The frequency is stored the same way as in the PSG. It is a 12-bit value. The first byte contains bits 0 to 7 from the frequency and bits 0 to 3 of the second byte contain bits 8 to 11 of the frequency. Bits 4 to 7 of the second byte are ignored. Remember that the value you enter is really a period: a higher value gives a lower frequency.
The formula for calculating the frequency of the tone is almost the same than for the PSG:
is the clock of the computer (always 3,579,545Hz on an MSX) and P is the 12 bits period set in the frequency register.
The volume is stored in the same way as in the MSX PSG, though it does not support envelopes. Bits 0 to 3 contain a volume of 0 to 15, and bits 7 to 4 are ignored. A volume of 0 is silent, and a volume of 15 is maximum volume.
Note: SCC volume is linear while the MSX PSG (usually the AY8910) has logarithmic levels according to (execept for n=0 that gives no output).
The on/off switch register switches the different channels on or off. Set bit 0 to activate channel 1, bit 1 for channel 2, and so on to bit 4 for channel 5. Bits 5 through 7 are ignored.
Deformation Register (98E0h)
This register is not used by any KonamiKonami
is a Japanese leading developer and publisher of numerous popular and strong-selling toys, trading cards, anime, tokusatsu, slot machines, arcade cabinets and video games...
game. All the addresses in the memory area (98E0h - 98FFh) refer to the same register. Resetting the SCC will set this register to 0.
The bits are RRB000XX with the following meaning:
XX: Freq multiplier
00 = *1
01 = *256
10 = *16
11 = *16
The lower two bits (XX) influence the frequency.
If set to 01b, all frequencies are multiplied by 256.
If set to 11b or 10b, all frequencies are multiplied by 16.
(This affects both freq of voice and rotation speed.)
B: Reset if freq is written
0 = Normal
1 = Start from beginning of sample when freq changes
If bit 5 is set, waveform playback is started from the beginning when a frequency register is written to.
(This can be also used to implement sub-sample phase differences and among channels)
RR: Rotation
00 = Normal, No rotation
01 = Rotate all waveforms with channel own freq. CH4 & CH5 common waveform will be rotated with CH5 freq.
10 = Rotate only CH4 & CH5 common waveform. Waveform will be rotated with CH4 freq.
11 = as 10, but to be verified by HW tests.
Channels that are rotating are READ ONLY. Writing will have no effect.
Rotating speed is same as reading speed of sample from memory.
This means that it is easy to use CH4 & CH5 common waveform as time counter for sample in other channel.
Note anyway, that reading too actively may cause noise as SCC can't read the memory at the same time.
Reading from this register will return FFh, but will set bit 6 of the register.
Since the waves start to rotate now, the values in 9800h through 987Fh will change each time you read them.
More on memory
The memory area from 9800h to 987Fh behaves as RAM as long as the deformation register is reset. The memory area from 9880h to 98FFh is write only; if you read it, it'll always return FFh. Watch out for reading from the deformation register, as this will set bit 6.The memory area from 9900h to 99FFh has exactly the same function as from 9800h to 98FFh, 9900h through 99FFh and so on to 9F00h through 9FFFh. This happens because the SCC chip is not connected to address lines A8 through A10, so it cannot distinguish these ranges.
External links
- Most of the information in this article comes from: http://bifi.msxnet.org/msxnet/tech/scc