List of Intel Core i5 microprocessors
Encyclopedia
The following is a list of Intel Core i5 brand microprocessor
s.
"Lynnfield" (45 nm)
"Clarkdale
"Arrandale
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
s.
"Lynnfield" (45 nm)Lynnfield (microprocessor)Lynnfield is the code name for a quad-core processor from Intel released in September 2009. It is sold in varying configurations as Core i5-7xx, Core i7-8xx or Xeon X34xx. Lynnfield uses the Nehalem microarchitecture and replaces the earlier Penryn based Yorkfield processor, using the same 45 nm...
- Based on Nehalem microarchitecture.
- All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), Intel VT-x, Turbo Boost, Smart Cache. - FSB has been replaced with DMIDirect Media InterfaceThe Direct Media Interface is the link between an Intel northbridge and an Intel southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous chipsets had used the Hub Interface to perform the same function. Server chipsets use a...
. - Transistors: 774 million
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 296 mm² - Stepping: B1
"ClarkdaleClarkdale (microprocessor)Clarkdale is the code name for an Intel processor, initially sold as desktop Intel Core i5 and Core i3 and Pentium. It is closely related to themobile Arrandale processor; both use dual-core dies based on the 32 nm...
" (32 nm)
- Based on Westmere microarchitecture.
- All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), TXT, Intel VT-x, Intel VT-d, Hyper-ThreadingHyper-threadingHyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, Turbo Boost, AES-NIAES instruction setAdvanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...
, Smart Cache. - Core i5-655K, Core i5-661 does not support Intel TXT and Intel VT-d.
- Core i5-655K features an unlocked multiplier.
- FSB has been replaced with DMIDirect Media InterfaceThe Direct Media Interface is the link between an Intel northbridge and an Intel southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous chipsets had used the Hub Interface to perform the same function. Server chipsets use a...
. - Transistors: 382 million
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 81 mm² - Transistors: 177 million
- Graphics and Integrated Memory Controller die size: 114 mm²
- Stepping: C2, K0
"Sandy Bridge" (32 nm)
- Based on Sandy Bridge microarchitectureSandy BridgeSandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...
. - All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, AVXAdvanced Vector ExtensionsAdvanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...
, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threadingHyper-threadingHyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, Turbo Boost, AES-NIAES instruction setAdvanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...
, Smart Cache. - Transistors: 624 or 504 million
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 149 or 131 mm²
"Sandy Bridge" (32 nm)
- Based on Sandy Bridge microarchitectureSandy BridgeSandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...
. - All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, AVXAdvanced Vector ExtensionsAdvanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...
, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), TXT, Intel VT-x, Intel VT-d, Turbo Boost, AES-NIAES instruction setAdvanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...
, Smart Cache. - All models support 2 channels DDR3-1333
- Core i5-2300, Core i5-2310, Core i5-2320, Core i5-2405S and Core i5-2500K does not support Intel TXT and Intel VT-d.
- S processors feature lower-than-normal TDP (65W on 4-core models).
- T processors feature an even lower TDP (45W on 4-core models or 35W on 2-core models).
- K processors are unlockable and designed for overclocking. Other processors will have limited overclocking due to chipset limitations.
- Transistors: 1.16 billion
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 216 mm²
"ArrandaleArrandale (microprocessor)Arrandale is the code name for a mobile Intel processor, sold as mobile Intel Core i3, i5 and i7 as well as Celeron and Pentium. It is closely related to the desktop Clarkdale processor; both use dual-core dies based on the 32 nm Westmere shrink of the Nehalem microarchitecture and have integrated...
" (32 nm)
- Based on Westmere microarchitecture.
- All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), Intel VT-x , Hyper-ThreadingHyper-threadingHyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, Turbo Boost, Smart Cache. - i5-5xx series (i5-520M, i5-520E, i5-540M, i5-560M, i5-580M, i5-520UM, i5-540UM, i5-560UM) supports AES-NI, TXT and Intel VT-d.
- FSB has been replaced with DMIDirect Media InterfaceThe Direct Media Interface is the link between an Intel northbridge and an Intel southbridge on a computer motherboard. It was first used between the 9xx chipsets and the ICH6, released in 2004. Previous chipsets had used the Hub Interface to perform the same function. Server chipsets use a...
. - Transistors: 382 million
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 81 mm² - Transistors: 177 million
- Graphics and Integrated Memory Controller die size: 114 mm²
- Stepping: C2, K0
- Core i5-520E has support for ECC memory and PCI express port bifurcation.
"Sandy Bridge" (32 nm)
- Based on Sandy Bridge microarchitectureSandy BridgeSandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...
. - All models support: MMX, SSEStreaming SIMD ExtensionsIn computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
, SSE2SSE2SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
, SSE3SSE3SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
, SSSE3SSSE3Supplemental Streaming SIMD Extensions 3 is a SIMD instruction set created by Intel and is the fourth iteration of the SSE technology.- History :...
, SSE4.1, SSE4.2, AVXAdvanced Vector ExtensionsAdvanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...
, Enhanced Intel SpeedStepSpeedStepSpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
Technology (EIST), Intel 64, XD bit (an NX bitNX bitThe NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...
implementation), TXT, Intel VT-x, Intel VT-d, Hyper-threadingHyper-threadingHyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, Turbo BoostIntel Turbo BoostIntel Turbo Boost is a technology implemented by Intel in certain versions of their Nehalem- and Sandy Bridge-based CPUs, including Core i5 and Core i7 that enables the processor to run above its base operating frequency via dynamic control of the CPU's "clock rate". It is activated when the...
, AES-NIAES instruction setAdvanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...
, Smart Cache. - Core i5-2410M, i5-2415M can support AES-NI with laptop OEM-supplied BIOS processor configuration update. TXT and Intel VT-d are not supported.
- Core i5-2430M, i5-2435M, i5-2467M do not support TXT and Intel VT-d.
- Core i5-2515E has support for ECC memory.
- Transistors: 624 million
- DieDie (integrated circuit)A die in the context of integrated circuits is a small block of semiconducting material, on which a given functional circuit is fabricated.Typically, integrated circuits are produced in large batches on a single wafer of electronic-grade silicon or other semiconductor through processes such as...
size: 149 mm²
See also
- Intel Core i5
- Nehalem (microarchitecture)
- Sandy Bridge (microarchitecture)Sandy Bridge (microarchitecture)Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...
- List of Intel Core i7 microprocessors
- List of Intel Core i3 microprocessors
- List of future Intel microprocessors