MPC5xx
Encyclopedia
The MPC5xx family of processors such as the MPC555 and MPC565 are 32-bit
PowerPC
embedded microprocessor
s that operate between 40 and 66 MHz and are frequently used in automotive applications including engine and transmission controllers. Delphi Corporation use either the MPC561 or MPC565 in the engine controllers they supply to General Motors
, with nearly all 2009 model GM North America vehicles now using an MPC5xx in the engine controller. Bosch
also used the MPC5xx throughout the EDC-16 series of Diesel Engine Controllers as did the Cummins B series diesel engine ECU
.
They are generally considered microcontroller
s because of their integrated peripheral set and their unusual architecture: no MMU
, large on-chip SRAM
and very large (as much as 1 MB
) low latency access on-chip flash memories
, which means their architecture
is tailored to control applications. Instead of a block-address translation and a hardware-driven, fixed-page address translation prescribed by the first PowerPC specification, the 5xx cores provided a software-driven translation mechanism that supported variable page sizes. This model is the basis for the embedded MMU model in the current Power ISA specification.
MPC5xx – All PowerPC 5xx family processors share this common naming scheme.
The development of the PowerPC 5xx family is discontinued in favour for the more flexible and powerful PowerPC 55xx family
.
s (ADC), Time Processor Units (TPU), GPIO
, and UARTS/serial
(QSMCM). The MPC5xx family descends from the MPC8xx PowerQUICC
family core, which means it uses a Harvard architecture
, single issue core. Unlike the 8xx family, the 5xx variants have a floating point unit
. While some of the earlier chips like the MPC509 had an instruction cache
, the recent chips have the capability to contain large amounts of NOR flash memory on-board which is capable of bursting instructions to the processor. Some low-cost chips omit the flash memory because it adds a lot of die area, driving up the price of the chip. Many controller applications run very long control loops where there is not a large dataset and low latency, deterministic access to both data and instruction routines is more important. If most of the data can be stored in the on-chip SRAM available to the datapath of the processor in a single cycle, performance can be quite good. If data must be accessed off-chip frequently, performance can be reduced because the chip cannot burst data accesses from external RAM and has a very slow bus
access protocol. Because of the simple memory interface that can be programmed by setting a default memory location and writing a few base registers, the chips are quite popular with hobbyists as well as with automotive and industrial developers.
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
PowerPC
PowerPC
PowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...
embedded microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
s that operate between 40 and 66 MHz and are frequently used in automotive applications including engine and transmission controllers. Delphi Corporation use either the MPC561 or MPC565 in the engine controllers they supply to General Motors
General Motors
General Motors Company , commonly known as GM, formerly incorporated as General Motors Corporation, is an American multinational automotive corporation headquartered in Detroit, Michigan and the world's second-largest automaker in 2010...
, with nearly all 2009 model GM North America vehicles now using an MPC5xx in the engine controller. Bosch
Robert Bosch GmbH
Robert Bosch GmbH is a multinational engineering and electronics company headquartered in Gerlingen, near Stuttgart, Germany. It is the world's largest supplier of automotive components...
also used the MPC5xx throughout the EDC-16 series of Diesel Engine Controllers as did the Cummins B series diesel engine ECU
Engine control unit
An engine control unit is a type of electronic control unit that determines the amount of fuel, ignition timing and other parameters an internal combustion engine needs to keep running...
.
They are generally considered microcontroller
Microcontroller
A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM...
s because of their integrated peripheral set and their unusual architecture: no MMU
Memory management unit
A memory management unit , sometimes called paged memory management unit , is a computer hardware component responsible for handling accesses to memory requested by the CPU...
, large on-chip SRAM
Static random access memory
Static random-access memory is a type of semiconductor memory where the word static indicates that, unlike dynamic RAM , it does not need to be periodically refreshed, as SRAM uses bistable latching circuitry to store each bit...
and very large (as much as 1 MB
Megabyte
The megabyte is a multiple of the unit byte for digital information storage or transmission with two different values depending on context: bytes generally for computer memory; and one million bytes generally for computer storage. The IEEE Standards Board has decided that "Mega will mean 1 000...
) low latency access on-chip flash memories
Flash memory
Flash memory is a non-volatile computer storage chip that can be electrically erased and reprogrammed. It was developed from EEPROM and must be erased in fairly large blocks before these can be rewritten with new data...
, which means their architecture
CPU design
CPU design is the design engineering task of creating a central processing unit , a component of computer hardware. It is a subfield of electronics engineering and computer engineering.- Overview :CPU design focuses on these areas:...
is tailored to control applications. Instead of a block-address translation and a hardware-driven, fixed-page address translation prescribed by the first PowerPC specification, the 5xx cores provided a software-driven translation mechanism that supported variable page sizes. This model is the basis for the embedded MMU model in the current Power ISA specification.
MPC5xx – All PowerPC 5xx family processors share this common naming scheme.
The development of the PowerPC 5xx family is discontinued in favour for the more flexible and powerful PowerPC 55xx family
PowerPC e200
The PowerPC e200 is a family of 32-bit Power Architecture microprocessor cores developed by Freescale for primary use in automotive and industrial control systems...
.
Characteristics
The peripherals on each model vary, but frequently include analog-to-digital converterAnalog-to-digital converter
An analog-to-digital converter is a device that converts a continuous quantity to a discrete time digital representation. An ADC may also provide an isolated measurement...
s (ADC), Time Processor Units (TPU), GPIO
GPIO
General Purpose Input/Output is a generic pin on a chip whose behavior can be controlled through software....
, and UARTS/serial
Serial communications
In telecommunication and computer science, serial communication is the process of sending data one bit at a time, sequentially, over a communication channel or computer bus. This is in contrast to parallel communication, where several bits are sent as a whole, on a link with several parallel channels...
(QSMCM). The MPC5xx family descends from the MPC8xx PowerQUICC
PowerQUICC
PowerQUICC is the name for several Power Architecture based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the QUICC Engine which is a separate RISC core specialized in such tasks such as I/O, communications, ATM, security acceleration, networking...
family core, which means it uses a Harvard architecture
Harvard architecture
The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape and data in electro-mechanical counters...
, single issue core. Unlike the 8xx family, the 5xx variants have a floating point unit
Floating point unit
A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...
. While some of the earlier chips like the MPC509 had an instruction cache
Cache
In computer engineering, a cache is a component that transparently stores data so that future requests for that data can be served faster. The data that is stored within a cache might be values that have been computed earlier or duplicates of original values that are stored elsewhere...
, the recent chips have the capability to contain large amounts of NOR flash memory on-board which is capable of bursting instructions to the processor. Some low-cost chips omit the flash memory because it adds a lot of die area, driving up the price of the chip. Many controller applications run very long control loops where there is not a large dataset and low latency, deterministic access to both data and instruction routines is more important. If most of the data can be stored in the on-chip SRAM available to the datapath of the processor in a single cycle, performance can be quite good. If data must be accessed off-chip frequently, performance can be reduced because the chip cannot burst data accesses from external RAM and has a very slow bus
Computer bus
In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same...
access protocol. Because of the simple memory interface that can be programmed by setting a default memory location and writing a few base registers, the chips are quite popular with hobbyists as well as with automotive and industrial developers.
External links
- Freescale's MPC5xx page
- MPC555, MPC565 Single Board Computers
- PowerPCPowerPCPowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...
- Power ArchitecturePower ArchitecturePower Architecture is a broad term to describe similar RISC instruction sets for microprocessors developed and manufactured by such companies as IBM, Freescale, AMCC, Tundra and P.A. Semi...