The PowerPC e200 is a family of 32-bit

32-bit

The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....

 Power Architecture

Power Architecture

Power Architecture is a broad term to describe similar RISC instruction sets for microprocessors developed and manufactured by such companies as IBM, Freescale, AMCC, Tundra and P.A. Semi...

 microprocessor

Microprocessor

A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...

 cores developed by Freescale for primary use in automotive and industrial control systems. The cores are designed to form the CPU part in system-on-a-chip

System-on-a-chip

A system on a chip or system on chip is an integrated circuit that integrates all components of a computer or other electronic system into a single chip. It may contain digital, analog, mixed-signal, and often radio-frequency functions—all on a single chip substrate...

 (SoC) designs with speed ranging up to 600 MHz, thus making them ideal for embedded applications

Embedded system

An embedded system is a computer system designed for specific control functions within a larger system. often with real-time computing constraints. It is embedded as part of a complete device often including hardware and mechanical parts. By contrast, a general-purpose computer, such as a personal...

.

The e200 core is developed from the MPC5xx

MPC5xx

The MPC5xx family of processors such as the MPC555 and MPC565 are 32-bit PowerPC embedded microprocessors that operate between 40 and 66 MHz and are frequently used in automotive applications including engine and transmission controllers...

 family processors, which in turn is derived from the MPC8xx core in the PowerQUICC

PowerQUICC

PowerQUICC is the name for several Power Architecture based microcontrollers from Freescale Semiconductor. They are built around one or more PowerPC cores and the QUICC Engine which is a separate RISC core specialized in such tasks such as I/O, communications, ATM, security acceleration, networking...

 SoC processors. e200 adheres to the Power ISA v.2.03 as well as the previous Book E specification. All e200 core based microprocessors are named in the MPC55xx and MPC56xx/JPC56x scheme, not to be confused with the MPC52xx processors which is based on the PowerPC e300

PowerPC e300

The PowerPC e300 is a family of 32-bit Power Architecture microprocessor cores developed by Freescale for primary use in system-on-a-chip designs with speed ranging up to 800 MHz, thus making them ideal for embedded applications....

 core.

In April 2007 Freescale and IPextreme opened up the e200 cores for licensing to other manufacturers.http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=980372

Continental AG

Continental AG

Continental AG, internally often called Conti for short, is a worldwide leading German manufacturer of tires, brake systems, vehicle stability control systems, engine injection systems, tachographs and other parts for the automotive and transport industries. The company is based in Hanover, Germany...

 and Freescale are developing SPACE, a tri-core e200 based processor designed for electronic brake systems in cars.http://media.freescale.com/phoenix.zhtml?c=196520&p=irol-newsArticle&ID=1063162

STMicroelectronics

STMicroelectronics

STMicroelectronics is an Italian-French electronics and semiconductor manufacturer headquartered in Geneva, Switzerland.While STMicroelectronics corporate headquarters and the headquarters for EMEA region are based in Geneva, the holding company, STMicroelectronics N.V. is registered in Amsterdam,...

 and Freescale have jointly developed microcontrollers for automotive applications based on e200 in the MPC56xx/SPC56x family.

e200z0

The simplest core, e200z0 features an in order

Out-of-order execution

In computer engineering, out-of-order execution is a paradigm used in most high-performance microprocessors to make use of instruction cycles that would otherwise be wasted by a certain type of costly delay...

, four stage pipeline

Instruction pipeline

An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput ....

 with no MMU

Memory management unit

A memory management unit , sometimes called paged memory management unit , is a computer hardware component responsible for handling accesses to memory requested by the CPU...

 or FPU

Floating point unit

A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...

. It uses the variable bit length (VLE) part of the Power ISA, which uses 16-bit versions of the otherwise standard 32-bit PowerPC Book E ISA, thus reducing code footprint by up to 30%. It has a single 32-bit AMBA

Advanced Microcontroller Bus Architecture

The Advanced Microcontroller Bus Architecture is used as the on-chip bus in system-on-a-chip designs. Since its inception, the scope of AMBA has gone far beyond microcontroller devices, and is now widely used on a range of ASIC and SoC parts including applications processors used in modern...

 bus interface.

The e200z0 is used in the MPC5510 as an optional co-processor alongside an e200z1 core, making that chip a multicore

Multicore

Multicore may refer to:* Multi-core processor ** Multicore Association, founded in 2005, a non-profit, industry consortium focused on multicore technology* multicore cable, a generic term for an electrical cable that has multiple cores...

 processor. e200z0 is available as co-processors to other e200 based processors as well as very low end stand alone processors.

e200z1

The e200z1 has a four stage, single-issue pipeline with a branch prediction unit

Branch predictor

In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the branch predictor is to improve the flow in the instruction pipeline...

 and an 8 entry MMU, but no FPU. It can use the complete 32-bit PowerPC ISA as well as the VLE instructions. It uses a dual 32-bit AMBA bus interface.

e200z3

The e200z3 has a four stage, single-issue pipeline with a branch prediction unit, a 16 entry MMU and a SIMD

SIMD

Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...

 capable FPU. It can use the complete 32-bit PowerPC ISA as well as the VLE instructions. It uses a dual 64-bit AMBA bus interface.

e200z4

The e200z4 has a five stage, dual-issue pipeline with a branch prediction unit, a 32 entry MMU, a SIMD capable FPU and a 16 KiB unified data/instruction L1 cache

CPU cache

A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations...

. It can use the complete 32-bit PowerPC ISA as well as the VLE instructions. It uses a dual 64-bit bus AMBA interface.

e200z6

The e200z6 has a seven stage, single-issue pipeline with a branch prediction unit, a 32 entry MMU, a SIMD capable FPU and a 32 KiB unified data/instruction L1 cache. It can use the complete 32-bit PowerPC ISA as well as the VLE instructions. It uses a dual 64-bit bus AMBA interface.

e200z7

The e200z7 has a ten stage, dual-issue pipeline with a branch prediction unit, a 32 entry MMU, a SIMD capable FPU and a 32 KiB unified data/instruction L1 cache. It can use the complete 32-bit PowerPC ISA as well as the VLE instructions. It uses a dual 64-bit bus AMBA interface.