Memory model
Encyclopedia
The Intel x86 cpu has six memory models which control how the segment registers
are used and the default size of pointers.
CS (code segment), SS (stack segment), and ES (extra segment).
A logical address on this platform is written segment:offset, in hexadecimal
. In real mode, in order to calculate the physical address of a byte of memory, one left-shifts the contents of the appropriate register 4 bits, and then adds the offset.
For example the logical address 7522:F139 yields the 20-bit physical address:
75220 + F139 = 84359
Note that this process leads to aliasing
of memory, such that any given physical address may have multiple logical representations. This means that comparison of pointers is a complicated process.
In protected mode
, the GDT
and LDT
are used for this purpose.
| Model
| Data
| Code
|-
| Tiny*
| colspan=2 align=center | near
|-
| Small
| near**
| near
|-
| Medium
| near
| far
|-
| Compact
| far
| near
|-
| Large
| far
| far
|-
| Huge
| huge
| huge
|->
* In the Tiny model, all four segment registers point to the
same segment.
** In all models with near data pointers, SS equals DS.
a segment cannot be writable and executable. Therefore, when implementing the Tiny memory model the code segment register must point to the same physical address and have the same limit as the data segment register. This defeated one of the features of the 80286, which makes sure data segments are never executable and code segment are never writable (which means that self-modifying code
is never allowed). However, on the 80386, with its paged memory management unit
it is possible to protect individual memory pages against writing.
Memory models are not limited to 16-bit programs. It is possible to use segmentation in 32-bit protected mode as well (resulting in 48-bit pointers) and there exist C language compilers which support that. However segmentation in 32-bit mode does not allow to access a larger address space than what a single segment would cover, unless some segments are not always present in memory and the linear address space is just used as a cache over a larger segmented virtual space. It mostly allows to better protect access to various objects (areas up to 1 megabyte long can benefit from a 1-byte access protection granularity, versus the coarse 4 KiB granularity offered by sole paging), and is therefore only used in specialized applications, like telecommunications software. Technically, the "flat" 32-bit address space is a "tiny" memory model for the segmented address space. Under both reigns all four segment registers contain one and the same value.
On the x86-64
platform, a total of seven memory models exist, as the majority of symbol references are only 32 bits wide, and if the addresses are known at link time (as opposed to position-independent code
). This does not affect the pointers used, which are always flat 64-bit pointers, but only how values that have to be accessed via symbols can be placed.
Processor register
In computer architecture, a processor register is a small amount of storage available as part of a CPU or other digital processor. Such registers are addressed by mechanisms other than main memory and can be accessed more quickly...
are used and the default size of pointers.
Memory segmentation
Four registers are used to refer to four segments on the 16-bit x86 segmented memory architecture. DS (data segment),CS (code segment), SS (stack segment), and ES (extra segment).
A logical address on this platform is written segment:offset, in hexadecimal
Hexadecimal
In mathematics and computer science, hexadecimal is a positional numeral system with a radix, or base, of 16. It uses sixteen distinct symbols, most often the symbols 0–9 to represent values zero to nine, and A, B, C, D, E, F to represent values ten to fifteen...
. In real mode, in order to calculate the physical address of a byte of memory, one left-shifts the contents of the appropriate register 4 bits, and then adds the offset.
For example the logical address 7522:F139 yields the 20-bit physical address:
Note that this process leads to aliasing
Aliasing (computing)
In computing, aliasing describes a situation in which a data location in memory can be accessed through different symbolic names in the program. Thus, modifying the data through one name implicitly modifies the values associated to all aliased names, which may not be expected by the programmer...
of memory, such that any given physical address may have multiple logical representations. This means that comparison of pointers is a complicated process.
In protected mode
Protected mode
In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units...
, the GDT
Global Descriptor Table
The Global Descriptor Table or GDT is a data structure used by Intel x86-family processors starting with the 80286 in order to define the characteristics of the various memory areas used during program execution, including the base address, the size and access privileges like executability and...
and LDT
Local Descriptor Table
The Local Descriptor Table is a memory table used in the x86 architecture in protected mode and containing memory segment descriptors: start in linear memory, size, executability, writability, access privilege, actual presence in memory, etc....
are used for this purpose.
Pointer sizes
Pointers formats are known as near, far, or huge.- Near pointers refer to the current segment, so neither DS nor CS must be modified to dereference the pointer. They are the fastest pointers, but are limited to point to 64 kilobytes of memory (the current segment).
- Far pointersFar pointerIn a segmented architecture computer, a far pointer is a pointer which includes a segment selector, making it possible to point to addresses outside of the current segment....
contain the new value of DS or CS within them. To use them the register must be changed, the memory dereferenced, and then the register restored. They may reference up to 1 megabyteMegabyteThe megabyte is a multiple of the unit byte for digital information storage or transmission with two different values depending on context: bytes generally for computer memory; and one million bytes generally for computer storage. The IEEE Standards Board has decided that "Mega will mean 1 000...
of memoryMemoryIn psychology, memory is an organism's ability to store, retain, and recall information and experiences. Traditional studies of memory began in the fields of philosophy, including techniques of artificially enhancing memory....
. Note that pointer arithmetic (addition and subtraction) does not modify the segment portion of the pointer, only its offset. Operations which exceed the bounds of zero or 65535 (0xFFFF) will undergo modulo 64K operation just as any normal 16 bit operation. The moment counter becomes (0x10000), the resulting absolute address will roll over to 0x5000:0000.
- Huge pointers are essentially far pointers, but are normalized every time they are modified so that they have the highest possible segment for that address. This is very slow but allows the pointer to point to multiple segments, and allows for accurate pointer comparisons, as if the platform were a flat memory modelFlat memory modelFlat memory model or linear memory model refers to a memory addressing paradigm in low-level software design such that the CPU can directly address all of the available memory locations without having to resort to any sort of memory segmentation or paging schemes.Memory management and...
: It forbids the aliasing of memory as described above, so two huge pointers that reference the same memory location are always equal.
Memory models
The memory models are:| Data
| Code
|-
| Tiny*
| colspan=2 align=center | near
|-
| Small
| near**
| near
|-
| Medium
| near
| far
|-
| Compact
| far
| near
|-
| Large
| far
| far
|-
| Huge
| huge
| huge
|->
same segment.
Other platforms
In protected modeProtected mode
In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units...
a segment cannot be writable and executable. Therefore, when implementing the Tiny memory model the code segment register must point to the same physical address and have the same limit as the data segment register. This defeated one of the features of the 80286, which makes sure data segments are never executable and code segment are never writable (which means that self-modifying code
Self-modifying code
In computer science, self-modifying code is code that alters its own instructions while it is executing - usually to reduce the instruction path length and improve performance or simply to reduce otherwise repetitively similar code, thus simplifying maintenance...
is never allowed). However, on the 80386, with its paged memory management unit
Memory management unit
A memory management unit , sometimes called paged memory management unit , is a computer hardware component responsible for handling accesses to memory requested by the CPU...
it is possible to protect individual memory pages against writing.
Memory models are not limited to 16-bit programs. It is possible to use segmentation in 32-bit protected mode as well (resulting in 48-bit pointers) and there exist C language compilers which support that. However segmentation in 32-bit mode does not allow to access a larger address space than what a single segment would cover, unless some segments are not always present in memory and the linear address space is just used as a cache over a larger segmented virtual space. It mostly allows to better protect access to various objects (areas up to 1 megabyte long can benefit from a 1-byte access protection granularity, versus the coarse 4 KiB granularity offered by sole paging), and is therefore only used in specialized applications, like telecommunications software. Technically, the "flat" 32-bit address space is a "tiny" memory model for the segmented address space. Under both reigns all four segment registers contain one and the same value.
On the x86-64
X86-64
x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...
platform, a total of seven memory models exist, as the majority of symbol references are only 32 bits wide, and if the addresses are known at link time (as opposed to position-independent code
Position-independent code
In computing, position-independent code or position-independent executable is machine instruction code that executes properly regardless of where in memory it resides...
). This does not affect the pointers used, which are always flat 64-bit pointers, but only how values that have to be accessed via symbols can be placed.
See also
- Memory model (computing)Memory model (computing)In computing, a memory model describes the interactions of threads through memory and specifies the assumptions the compiler is allowed to make when generating code for segmented memory or paged memory platforms.-History and significance:...
- segmented memory
- x86
- flat memory modelFlat memory modelFlat memory model or linear memory model refers to a memory addressing paradigm in low-level software design such that the CPU can directly address all of the available memory locations without having to resort to any sort of memory segmentation or paging schemes.Memory management and...
- pointers
- Memory segmentMemory segmentx86 memory segmentation refers to the implementation of memory segmentation on the x86 architecture. Memory is divided into portions that may be addressed by a single index register without changing a 16-bit segment selector. In real mode or V86 mode, a segment is always 64 kilobytes in size . In...