Tagged Command Queuing
Encyclopedia
Tagged Command Queuing (TCQ) is a technology built into certain ATA and SCSI
hard drives. It allows the operating system to send multiple read and write requests to a hard drive. ATA TCQ is not identical in function to the more efficient native command queuing
(NCQ) used by SATA
drives. SCSI TCQ does not suffer from the same limitations as ATA TCQ.
Before TCQ, an operating system was only able to send one request at a time. In order to boost performance, it had to decide the order of the requests based on its own, possibly incorrect, idea of what the hard drive was doing. With TCQ, the drive can make its own decisions about how to order the requests (and in turn relieve the operating system from having to do so). The result is that TCQ can improve the overall performance of a hard drive if it is implemented correctly.
This queuing mechanism is sometimes referred to as "elevator seeking", as the image of a modern elevator
in a building servicing multiple calls and processing them to minimise travel illustrates the idea well.
If the buttons for floors 5, 2, and 4 are pressed in that order with the elevator starting on floor 1, an old elevator would go to the floors in the order requested. A modern elevator processes the requests to stop at floors in the logical order 2, 4, and 5, without unnecessary travel. Non-queueing disk drives service the requests in the order received, like an old elevator; queueing drives service requests in the most efficient order. This may improve performance slightly in a system used by a single user, but may dramatically increase performance in a system with many users making widely varied requests on the disk surface.
TCQ is the first popular version of TCQ and is still popular today. It allows tasks to be entered into a queue using one of three different modes:
In head of queue mode, unique to SCSI TCQ, a task is pushed into the front of a queue, ahead of all other tasks including other pending head of queue tasks. This mode is not used much because it can cause resource starvation
when abused.
In ordered mode, a task must execute after all older tasks have completed and before all newer tasks begin to execute (excluding newer head of queue tasks)..
Simple mode allows tasks to execute in any order that does not violate the constraints on the tasks in the other two modes. After a command in a task is completed, a notification is sent by the device that completed the command to the host bus adapter. Whether or not SCSI TCQ causes massive interrupt overhead depends on the bus being used to connect the SCSI host bus adapter. On Conventional PCI, PCI-X
, PCI Express
, and other buses that permit it, first party DMA
allows for low interrupt overhead. The older ISA bus required a SCSI host adapter to generate a interrupt to cause the CPU to program the third-party DMA engine to perform a transfer, and then required another interrupt to notify the CPU that a task in the queue was finished, causing high CPU overhead.
permits up to 32 tag bits, and Fibre Channel
permits up to 16 bits of tag with tag 0xFFFF reserved. This flexibility allows the designer of a protocol to trade off queuing ability against cost. Networks that can be large, such as iSCSI networks, benefit from more tag bits to deal with the larger number of disks in the network and the larger latencies such large networks generate, while smaller-scale networks, such as parallel SCSI chains, do not have enough disks or latency to need many tag bits and can save money by using a system supporting fewer bits.
TCQ was developed in attempt to bring the same benefits as SCSI to ATA drives. It is available in both Parallel and Serial ATA.
This effort was not very successful because the ATA bus started out as a reduced-pin-count ISA bus. The requirement for software compatibility made ATA host bus adapters act like ISA bus devices without first party DMA. When a drive was ready for a transfer, it had to interrupt the CPU, wait for the CPU to ask the disk what command was ready to execute, respond with the command that it was ready to execute, wait for the CPU to program the host bus adapter's third party DMA engine based on the result of that command, wait for the third party DMA engine to execute the command, and then had to interrupt the CPU again to notify it when the DMA engine finished the task so that the CPU could notify the thread that requested the task that the requested task was finished. Since responding to interrupts uses CPU time, CPU utilization rose quickly when ATA TCQ was enabled . Also, since interrupt service time can be unpredictable, there are times when the disk is ready to transfer data but is unable to do so because it must wait for a CPU to respond to the interrupt so that the CPU knows that it needs to program the third party DMA engine.
Therefore, this standard was rarely implemented because it caused high CPU utilization without improving performance enough to make this worthwhile. This standard allows up to 32 outstanding commands per device .
NCQ
is a modern standard which drastically reduces the number of required CPU interrupts compared to ATA TCQ. Like ATA TCQ, it allows up to 32 outstanding commands per device, but was designed to take advantage of the ability of SATA host bus adapters that are not emulating parallel ATA behavior to support first party DMA. Instead of interrupting the CPU before the task to force it to program the host bus adapter's DMA engine, the hard drive tells the host bus adapter which command it wants to execute, causing the host bus adapter to program its integrated first-party DMA engine with the parameters that were included in the command that was selected by the hard drive when it was first issued, and then the DMA engine moves the data needed to execute the command. To further reduce the interrupt overhead, the drive can withhold the interrupt with the task completed messages until it gathers many of them to send at once, allowing the operating system to notify many threads simultaneously that their tasks have been completed. If another task completes after such an interrupt is sent, the host bus adapter can concatenate the completion messages together if the first set of completion messages has not been sent to the CPU. This allows the hard disk firmware design to trade off disk performance against CPU utilization by determining when to withhold and when to send completion messages.
SCSI
Small Computer System Interface is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it...
hard drives. It allows the operating system to send multiple read and write requests to a hard drive. ATA TCQ is not identical in function to the more efficient native command queuing
Native Command Queuing
Native Command Queuing is a technology designed to increase performance of SATA hard disks under certain conditions by allowing the individual hard disk to internally optimize the order in which received read and write commands are executed...
(NCQ) used by SATA
Serial ATA
Serial ATA is a computer bus interface for connecting host bus adapters to mass storage devices such as hard disk drives and optical drives...
drives. SCSI TCQ does not suffer from the same limitations as ATA TCQ.
Before TCQ, an operating system was only able to send one request at a time. In order to boost performance, it had to decide the order of the requests based on its own, possibly incorrect, idea of what the hard drive was doing. With TCQ, the drive can make its own decisions about how to order the requests (and in turn relieve the operating system from having to do so). The result is that TCQ can improve the overall performance of a hard drive if it is implemented correctly.
Overview
For efficiency the sectors should be serviced in order of proximity to the current head position, rather than in the order received. The queue is constantly receiving new requests and fulfilling and removing existing requests, and re-ordering the queue according to the current pending read/write requests and the changing position of the head. The exact reordering algorithm may depend upon the controller and the drive itself, but the host computer simply makes requests as needed, leaving the controller to handle the details.This queuing mechanism is sometimes referred to as "elevator seeking", as the image of a modern elevator
Elevator
An elevator is a type of vertical transport equipment that efficiently moves people or goods between floors of a building, vessel or other structures...
in a building servicing multiple calls and processing them to minimise travel illustrates the idea well.
If the buttons for floors 5, 2, and 4 are pressed in that order with the elevator starting on floor 1, an old elevator would go to the floors in the order requested. A modern elevator processes the requests to stop at floors in the logical order 2, 4, and 5, without unnecessary travel. Non-queueing disk drives service the requests in the order received, like an old elevator; queueing drives service requests in the most efficient order. This may improve performance slightly in a system used by a single user, but may dramatically increase performance in a system with many users making widely varied requests on the disk surface.
SCSI TCQ
SCSISCSI
Small Computer System Interface is a set of standards for physically connecting and transferring data between computers and peripheral devices. The SCSI standards define commands, protocols, and electrical and optical interfaces. SCSI is most commonly used for hard disks and tape drives, but it...
TCQ is the first popular version of TCQ and is still popular today. It allows tasks to be entered into a queue using one of three different modes:
- head of queue
- ordered
- simple
In head of queue mode, unique to SCSI TCQ, a task is pushed into the front of a queue, ahead of all other tasks including other pending head of queue tasks. This mode is not used much because it can cause resource starvation
Resource starvation
In computer science, starvation is a multitasking-related problem, where a process is perpetually denied necessary resources. Without those resources, the program can never finish its task....
when abused.
In ordered mode, a task must execute after all older tasks have completed and before all newer tasks begin to execute (excluding newer head of queue tasks)..
Simple mode allows tasks to execute in any order that does not violate the constraints on the tasks in the other two modes. After a command in a task is completed, a notification is sent by the device that completed the command to the host bus adapter. Whether or not SCSI TCQ causes massive interrupt overhead depends on the bus being used to connect the SCSI host bus adapter. On Conventional PCI, PCI-X
PCI-X
PCI-X, short for PCI-eXtended, is a computer bus and expansion card standard that enhances the 32-bit PCI Local Bus for higher bandwidth demanded by servers. It is a double-wide version of PCI, running at up to four times the clock speed, but is otherwise similar in electrical implementation and...
, PCI Express
PCI Express
PCI Express , officially abbreviated as PCIe, is a computer expansion card standard designed to replace the older PCI, PCI-X, and AGP bus standards...
, and other buses that permit it, first party DMA
Direct memory access
Direct memory access is a feature of modern computers that allows certain hardware subsystems within the computer to access system memory independently of the central processing unit ....
allows for low interrupt overhead. The older ISA bus required a SCSI host adapter to generate a interrupt to cause the CPU to program the third-party DMA engine to perform a transfer, and then required another interrupt to notify the CPU that a task in the queue was finished, causing high CPU overhead.
SCSI TCQ Tag Length
The SCSI-3 protocol permits 64 bits to be used in the tag field, allowing up to 264 tasks in one task set to be issued before requiring that some of them complete before any more commands be issued. However, different protocols that implement the SCSI protocol might not permit the use of all 64 bits. For example, older parallel SCSI permits 8 bits of tag bits, iSCSIISCSI
In computing, iSCSI , is an abbreviation of Internet Small Computer System Interface, an Internet Protocol -based storage networking standard for linking data storage facilities. By carrying SCSI commands over IP networks, iSCSI is used to facilitate data transfers over intranets and to manage...
permits up to 32 tag bits, and Fibre Channel
Fibre Channel
Fibre Channel, or FC, is a gigabit-speed network technology primarily used for storage networking. Fibre Channel is standardized in the T11 Technical Committee of the InterNational Committee for Information Technology Standards , an American National Standards Institute –accredited standards...
permits up to 16 bits of tag with tag 0xFFFF reserved. This flexibility allows the designer of a protocol to trade off queuing ability against cost. Networks that can be large, such as iSCSI networks, benefit from more tag bits to deal with the larger number of disks in the network and the larger latencies such large networks generate, while smaller-scale networks, such as parallel SCSI chains, do not have enough disks or latency to need many tag bits and can save money by using a system supporting fewer bits.
ATA TCQ
ATAAT Attachment
Parallel ATA , originally ATA, is an interface standard for the connection of storage devices such as hard disks, solid-state drives, floppy drives, and optical disc drives in computers. The standard is maintained by X3/INCITS committee...
TCQ was developed in attempt to bring the same benefits as SCSI to ATA drives. It is available in both Parallel and Serial ATA.
This effort was not very successful because the ATA bus started out as a reduced-pin-count ISA bus. The requirement for software compatibility made ATA host bus adapters act like ISA bus devices without first party DMA. When a drive was ready for a transfer, it had to interrupt the CPU, wait for the CPU to ask the disk what command was ready to execute, respond with the command that it was ready to execute, wait for the CPU to program the host bus adapter's third party DMA engine based on the result of that command, wait for the third party DMA engine to execute the command, and then had to interrupt the CPU again to notify it when the DMA engine finished the task so that the CPU could notify the thread that requested the task that the requested task was finished. Since responding to interrupts uses CPU time, CPU utilization rose quickly when ATA TCQ was enabled . Also, since interrupt service time can be unpredictable, there are times when the disk is ready to transfer data but is unable to do so because it must wait for a CPU to respond to the interrupt so that the CPU knows that it needs to program the third party DMA engine.
Therefore, this standard was rarely implemented because it caused high CPU utilization without improving performance enough to make this worthwhile. This standard allows up to 32 outstanding commands per device .
SATA NCQ
SATASerial ATA
Serial ATA is a computer bus interface for connecting host bus adapters to mass storage devices such as hard disk drives and optical drives...
NCQ
Native Command Queuing
Native Command Queuing is a technology designed to increase performance of SATA hard disks under certain conditions by allowing the individual hard disk to internally optimize the order in which received read and write commands are executed...
is a modern standard which drastically reduces the number of required CPU interrupts compared to ATA TCQ. Like ATA TCQ, it allows up to 32 outstanding commands per device, but was designed to take advantage of the ability of SATA host bus adapters that are not emulating parallel ATA behavior to support first party DMA. Instead of interrupting the CPU before the task to force it to program the host bus adapter's DMA engine, the hard drive tells the host bus adapter which command it wants to execute, causing the host bus adapter to program its integrated first-party DMA engine with the parameters that were included in the command that was selected by the hard drive when it was first issued, and then the DMA engine moves the data needed to execute the command. To further reduce the interrupt overhead, the drive can withhold the interrupt with the task completed messages until it gathers many of them to send at once, allowing the operating system to notify many threads simultaneously that their tasks have been completed. If another task completes after such an interrupt is sent, the host bus adapter can concatenate the completion messages together if the first set of completion messages has not been sent to the CPU. This allows the hard disk firmware design to trade off disk performance against CPU utilization by determining when to withhold and when to send completion messages.
External links
- Can Command Queuing Turbo Charge SATA? by Patrick Schmid, and Achim Roos of Tom's Hardware Guide