In computer science engineering, an opcode is the portion of a machine language instruction that specifies the operation to be performed. Their specification and format are laid out in the instruction set architecture of the processor in question...
is a processor supplementary instruction (its name derived from CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
IDentification) for the x86 architecture. It was introduced by Intel in 1993 when it introduced the Pentium and SL-Enhanced 486 processors.
By using the CPUID opcode, software can determine processor type and the presence of features (like MMX/SSE
Streaming SIMD Extensions
In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
). The CPUID opcode is 0FA2h and the value in the EAX register specifies what information to return.
Prior to the general availability of the CPUID instruction, programmers would write esoteric machine code
Machine code
Machine code or machine language is a system of impartible instructions executed directly by a computer's central processing unit. Each instruction performs a very specific task, typically either an operation on a unit of data Machine code or machine language is a system of impartible instructions...
which exploited minor differences in CPU behavior in order to determine the processor make and model. Outside the x86 family, developers are sometimes still required to use esoteric processes to determine the variations in CPU design are present. While the CPUID instruction is specific to the x86 architecture, other architectures often provide on-chip registers which can be read to obtain the same sorts of information provided by this instruction.
An assembly language is a low-level programming language for computers, microprocessors, microcontrollers, and other programmable devices. It implements a symbolic representation of the machine codes and other constants needed to program a given CPU architecture...
the CPUID instruction takes no parameters as CPUID implicitly uses the EAX register. The EAX register should be loaded with a value specifying what information to return. CPUID should be called with EAX = 0 first, as this will return the highest calling parameter that the CPU supports. To obtain extended function information CPUID should be called with bit 31 of EAX set. To determine the highest extended function calling parameter, call CPUID with EAX = 80000000h.
EAX=0: Get vendor ID
This returns the CPU's manufacturer ID string - a twelve character ASCII
ASCII
The American Standard Code for Information Interchange is a character-encoding scheme based on the ordering of the English alphabet. ASCII codes represent text in computers, communications equipment, and other devices that use text...
string stored in EBX, EDX, ECX - in that order. The highest basic calling parameter is returned in EAX.
The following are known processor manufacturer ID strings:
"AMDisbetter!" - early engineering samples of AMD K5
AMD K5
The K5 was AMD's first x86 processor to be developed entirely in-house. Introduced in March 1996, its primary competition was Intel's Pentium microprocessor. The K5 was an ambitious design, closer to a Pentium Pro than a Pentium regarding technical solutions and internal architecture...
Advanced Micro Devices, Inc. or AMD is an American multinational semiconductor company based in Sunnyvale, California, that develops computer processors and related technologies for commercial and consumer markets...
Centaur Technology is an x86 CPU design company, now a wholly owned subsidiary of VIA Technologies, a member of the Formosa Plastics Group, Taiwan's largest industrial conglomerate.-History:...
Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas as a specialist supplier of high-performance math coprocessors for 286 and 386 microprocessors. The company was founded by former Texas Instruments staff members and had a long but troubled relationship...
Intel Corporation is an American multinational semiconductor chip maker corporation headquartered in Santa Clara, California, United States and the world's largest semiconductor chip maker, based on revenue. It is the inventor of the x86 series of microprocessors, the processors found in most...
Transmeta Corporation was a US-based corporation that licensed low power semiconductor intellectual property. Transmeta originally produced very long instruction word code morphing microprocessors, with a focus on reducing power consumption in electronic devices. It was founded in 1995 by Bob...
Transmeta Corporation was a US-based corporation that licensed low power semiconductor intellectual property. Transmeta originally produced very long instruction word code morphing microprocessors, with a focus on reducing power consumption in electronic devices. It was founded in 1995 by Bob...
National Semiconductor was an American semiconductor manufacturer, that specialized in analog devices and subsystems,formerly headquartered in Santa Clara, California, USA. The products of National Semiconductor included power management circuits, display drivers, audio and operational amplifiers,...
NexGen was a private semiconductor company that designed x86 microprocessors until it was purchased by AMD in 1996.Like competitor Cyrix, NexGen was a fabless design house that designed its chips but relied on other companies for production...
Rise Technology, was a short lived microprocessor manufacturer that produced the Intel x86 MMX compatible mP6 processor.The Santa Clara, California based company was started by David Lin in 1993 with funding from 15 Taiwanese investors, including UMC, ACER and VIA Technologies...
Silicon Integrated Systems is a company that manufactures, among other things, motherboard chipsets. The company was founded in 1987 in Hsinchu Science Park, Taiwan.-Business:...
UMC was founded as Taiwan's first semiconductor company in 1980 as a spin-off of the government-sponsored Industrial Technology Research Institute .-Overview:...
VIA Technologies is a Taiwanese manufacturer of integrated circuits, mainly motherboard chipsets, CPUs, and memory, and is part of the Formosa Plastics Group. It is the world's largest independent manufacturer of motherboard chipsets...
The Vortex86 is a SoC based on an x86 compatible core. It formerly belonged to SiS, which got the basic design from Rise Technology, and was sold to the Taiwanese DM&P Electronics....
For instance, on a GenuineIntel processor values returned in EBX is 0x756e6547, EDX is 0x49656e69 and ECX is 0x6c65746e. The following code is written in GNU Assembler
GNU Assembler
The GNU Assembler, commonly known as GAS , is the assembler used by the GNU Project. It is the default back-end of GCC. It is used to assemble the GNU operating system and the Linux kernel, and various other software. It is a part of the GNU Binutils package.GAS' executable is named after as, a...
x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...
architecture and displays the vendor ID string as well as the highest calling parameter that the CPU supports.
.section .data
s0 : .asciz "Largest Standard Function Number Supported: %i\n"
s1 : .asciz "Vendor ID : %.12s\n"
This returns the CPU's stepping, model, and family information in EAX (also called the signature of a CPU), feature flags in EDX and ECX, and additional feature info in EBX.
The format of the information in EAX is as follows:
3:0 - Stepping
7:4 - Model
11:8 - Family
13:12 - Processor Type
19:16 - Extended Model
27:20 - Extended Family
Intel has suggested applications to display the family of a CPU as the sum of the "Family" and the "Extended Family" fields shown above, and the model as the sum of the "Model" and the 4-bit left-shifted "Extended Model" fields.
AMD recommends the same only if "Family" is equal to 15 (i.e. all bits set to 1). If "Family" is lower than 15, only the "Family" and "Model" fields should be used while the "Extended Family" and "Extended Model" bits are reserved. If "Family" is set to 15, then "Extended Family" and the 4-bit left-shifted "Extended Model" should be added to the respective base values.
The processor info and feature flags are manufacturer specific but usually the Intel values are used by other manufacturers for the sake of compatibility.
x87 is a floating point-related subset of the x86 architecture instruction set. It originated as an extension of the 8086 instruction set in the form of optional floating point coprocessors that worked in tandem with corresponding x86 CPUs. These microchips had names ending in "87"...
Carry-less Multiplication is an extension to the x86 instruction set used by microprocessors from Intel and AMD which was proposed by Intel in March 2008 and made available in the Intel Westmere processors announced in early 2010. The purpose is to improve the speed of applications doing block...
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
The Time Stamp Counter is a 64-bit register present on all x86 processors since the Pentium. It counts the number of ticks since reset. The instruction "RDTSC" returns the TSC in EDX:EAX. In x86_64 mode, RDTSC also clears the higher 32 bits of RAX. Its opcode is 0F 31. Pentium competitors such as...
Model-specific registers are control registers provided by processor implementations to provide system software with features that are provided on specific processor implementations, but not others....
In computing, x86 virtualization is the facility that allows multiple operating systems to simultaneously share x86 processor resources in a safe and efficient manner, a facility generically known as hardware virtualization...
SpeedStep is a trademark for a series of dynamic frequency scaling technologies built into some Intel microprocessors that allow the clock speed of the processor to be dynamically changed by software...
In computer science, the compare-and-swap CPU instruction is a special instruction that atomically compares the contents of a memory location to a given value and, only if they are the same, modifies the contents of that memory location to a given new value...
TM2, or "Thermal Monitoring 2", is a throttling control method used on LGA 775 versions of the Pentium 4, Pentium D and Celeron processors and also on the Pentium M series of processors. TM2 reduces processor temperature by lowering the CPU clock multiplier, and thereby the processor core speed...
In computing, an Advanced Programmable Interrupt Controller is a more complex Programmable Interrupt Controller than Intel's original types such as the 8259A...
Memory type range registers are a set of processor supplementary capabilities control registers that provide system software with control of how accesses to memory ranges by the CPU are cached...
The FMA instruction set is the name of a future extension to the 128-bit SIMD instructions in the X86 microprocessor instruction set to perform fused multiply–add operations...
In computing, Machine Check Architecture refers to a mechanism in which the CPU reports hardware errors to the operating system.Intel's Pentium 4, Intel Xeon, P6 family processors as well as the Itanium architecture implement a machine check architecture that provides a mechanism for detecting and...
FCMOV is a floating point conditional move opcode of the Intel x86 architecture, first introduced in Pentium Pro processors. It copies the contents of one of the floating point stack register, depending on the contents of EFLAGS integer flag register, to the ST register...
SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
The x2APIC architecture provides backward compatibility to the Intel APIC Architecture/xAPIC architecture and forward extendability for future Intel platform innovations.-More information:...
In computing, the Advanced Configuration and Power Interface specification provides an open standard for device configuration and power management by the operating system....
Intel Atom is the brand name for a line of ultra-low-voltage x86 and x86-64 CPUs from Intel, designed in 45 nm CMOS and used mainly in netbooks, nettops, embedded application ranging from health care to advanced robotics and Mobile Internet devices...
In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...
Advanced Encryption Standard Instruction Set is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008...
SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...
Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
Advanced Vector Extensions is an extension to the x86 instruction set architecture for microprocessors from Intel and AMD proposed by Intel in March 2008 and first supported by Intel with the Westmere processor shipping in Q1 2011 and now by AMD with the Bulldozer processor shipping in Q3 2011.AVX...
The CVT16 instruction set, announced by AMD on May 1, 2009, is an extension to the 128-bit SSE core instructions in the x86 and AMD64 instruction set.CVT16 is a revision of part of the SSE5 instruction set proposal announced on August 30, 2007...
RdRand is an instruction for returning random numbers from an on-chip random number generator that will be available in Ivy Bridge processors. It is part of the Intel 64 instruction set architecture...
In computing, a hypervisor, also called virtual machine manager , is one of many hardware virtualization techniques that allow multiple operating systems, termed guests, to run concurrently on a host computer. It is so named because it is conceptually one level higher than a supervisory program...
(always 0 on a real CPU)
EAX=2: Cache and TLB Descriptor information
This returns a list of descriptors indicating cache and TLB
Translation Lookaside Buffer
A translation lookaside buffer is a CPU cache that memory management hardware uses to improve virtual address translation speed. All current desktop and server processors use a TLB to map virtual and physical address spaces, and it is ubiquitous in any hardware which utilizes virtual memory.The...
capabilities in EAX, EBX, ECX and EDX registers.
EAX=3: Processor Serial Number
This returns the processor's serial number. The processor serial number was introduced on Intel Pentium III
Pentium III
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors...
, but due to privacy concerns, this feature is no longer implemented on later models (PSN feature bit is always cleared). Transmeta's
Transmeta
Transmeta Corporation was a US-based corporation that licensed low power semiconductor intellectual property. Transmeta originally produced very long instruction word code morphing microprocessors, with a focus on reducing power consumption in electronic devices. It was founded in 1995 by Bob...
Efficeon and Crusoe processors also provide this feature. AMD CPUs however, do not implement this feature in any CPU models.
For Intel Pentium III CPUs, the serial number is returned in EDX:ECX registers. For Transmeta Efficeon CPUs, it is returned in EBX:EAX registers. And for Transmeta Crusoe CPUs, it is returned in EBX register only.
Note that the processor serial number feature must be enabled in the BIOS
BIOS
In IBM PC compatible computers, the basic input/output system , also known as the System BIOS or ROM BIOS , is a de facto standard defining a firmware interface....
setting in order to function.
EAX=80000000h: Get Highest Extended Function Supported
The highest calling parameter is returned in EAX.
EAX=80000001h: Extended Processor Info and Feature Bits
This returns extended feature flags in EDX and ECX.
These return the processor brand string in EAX, EBX, ECX and EDX. CPUID must be issued with each parameter in sequence to get the entire 48-byte null-terminated ASCII processor brand string. It is necessary to check whether the feature is supported by the CPU by issuing CPUID with EAX = 80000000h first and checking if the returned value is greater or equal to 80000004h.
.section .data
This function contains the processor’s L1 cache and TLB characteristics.
EAX=80000006h: Extended L2 Cache Features
Returns details of the L2 cache in ECX, including the line size in bytes, type of associativity (encoded by a 4 bits) and the cache size.
.section .data
EAX=80000007h: Advanced Power Management Information
This function provides advanced power management feature identifiers.
EAX=80000008h: Virtual and Physical address Sizes
Returns largest virtual and physical address sizes in EAX.
Accessing the id from other languages
This information is easy to access from other languages as well. For instance, the C++ code for gcc below prints the first five values, returned by the cpuid:
include
int main
{
int a, b;
for (a = 0; a < 5; a++)
{
__asm ( "mov %1, %%eax; " // a into eax
"cpuid;"
"mov %%eax, %0;" // eax into b
:"=r"(b) // output
:"r"(a) // input
:"%eax","%ebx","%ecx","%edx" // clobbered register
);
std::cout << "The code " << a << " gives " << b << std::endl;
}
return 0;
}
In C, the code may be shortened to:
int main
{
int a, b;
for (a = 0; a < 5; a++)
{
__asm( "cpuid"
: "=a" (b) // EAX into b (output)
: "a" (a) // a into EAX (input)
:"%ebx","%ecx","%edx"); // cpuid always clobbers these
printf("The code %i gives %i\n", a, b);
}
return 0;
}
Or, a generally useful C implementation that works on 32 and 64 bit setups:
int main
{
unsigned int eax, ebx, ecx, edx;
int i;
for (i = 0; i < 6; ++i)
{
cpuid(i, &eax, &ebx, &ecx, &edx);
printf("eax=%i: %#010x %#010x %#010x %#010x\n", i, eax, ebx, ecx, edx);
}
return 0;
}
Microsoft Visual C compiler has builtin function __cpuid so cpuid instruction may be embedded without using inline assembly. This is handy since x64 version of MSVC doesn't allow inline assembly at all. The same program for MSVC would be:
include
include
int main
{
int b[4];
for (int a = 0; a < 5; a++)
{
__cpuid(b,a);
std::cout << "The code " << a << " gives " << b[0] << std::endl;
}
return 0;
}
For Borland/Embarcadero C compilers (bcc32), native asm function calls are necessary, as there is no asm implementation. The pseudo code:
unsigned int a, b, c, d;
unsigned int InfoType = 0;
__asm xor EBX, EBX;
__asm xor ECX, ECX;
__asm xor EDX, EDX;
__asm mov EAX, InfoType;
__asm cpuid;
__asm mov a, EAX;
__asm mov b, EBX;
__asm mov c, ECX;
__asm mov d, EDX;
Uptake of CPUID instructions outside x86
The Intel-AMD x86 family has so far been the only CPU family to have a CPUID instruction. RISC, DSP and transputer like chip families have not taken up the instruction in any noticeable way, in spite of having (in relative terms) as many variations in design.
CPU-Z is a freeware system profiler application for Microsoft Windows that detects the central processing unit, RAM, motherboard chipset, and other hardware features of a modern personal computer, and presents the information in one window.CPU-Z is more in-depth in almost all areas than the tools...
, a Windows utility that uses CPUID to identify various system settings.
