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See also

• Intel APIC Architecture
  Intel APIC Architecture
  The Intel APIC Architecture is a system of advanced programmable interrupt controllers designed by Intel for use in symmetric multiprocessor computer systems. It was originally implemented by the Intel 82093AA and 82489DX, and is found in most x86 SMP motherboards...
  
  
• Intel 8259
  Intel 8259
  The Intel 8259 is a Programmable Interrupt Controller designed for the Intel 8085 and Intel 8086 microprocessors. The initial part was 8259, a later A suffix version was upward compatible and usable with the 8086 or 8088 processor...
  
  
• Advanced Programmable Interrupt Controller
  Advanced Programmable Interrupt Controller
  In computing, an Advanced Programmable Interrupt Controller is a more complex Programmable Interrupt Controller than Intel's original types such as the 8259A...
  
   (APIC)
• Programmable Interrupt Controller
  Programmable Interrupt Controller
  In computing, a programmable interrupt controller is a device that is used to combine several sources of interrupt onto one or more CPU lines, while allowing priority levels to be assigned to its interrupt outputs. When the device has multiple interrupt outputs to assert, it will assert them in...
  
   (PIC)
• Inter-processor interrupt
  Inter-Processor Interrupt
  An inter-processor interrupt is a special type of interrupt by which one processor may interrupt another processor in a multiprocessor system. IPIs are typically used to implement a cache coherency synchronization point.- Windows :...
  
   (IPI)
• Interrupt
  Interrupt
  In computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
  
  
• Interrupt handler
  Interrupt handler
  An interrupt handler, also known as an interrupt service routine , is a callback subroutine in microcontroller firmware, operating system or device driver whose execution is triggered by the reception of an interrupt...
  
  
• Message Signaled Interrupts
  Message Signaled Interrupts
  Message Signaled Interrupts, in PCI 2.2and later in PCI Express, are an alternative way of generating an interrupt. Traditionally, a device has an interrupt pin which it asserts when it wants to interrupt the host CPU. While PCI Express does not have separate interrupt pins, it has special...
  
   (MSI)
• Non-maskable interrupt
  Non-Maskable interrupt
  A non-maskable interrupt is a computer processor interrupt that cannot be ignored by standard interrupt masking techniques in the system. It is typically used to signal attention for non-recoverable hardware errors...
  
  (NMI)

External links

• Intel 64 Architecture x2APIC Specification (PDF)
• Intel MultiProcessor Specification Version 1.4 May 1997 (PDF)
• Intel 82093AA I/O Advanced Programmable Interrupt Controller (I/O APIC) Datasheet
• Key Benefits of the I/O APIC Microsoft's explanation of I/O APIC
• Importance of Implementing APIC-Based Interrupt Subsystems on Uniprocessor PCs
• Advanced Programmable Interrupt Controller A short introduction of what APIC is and its benefits