Cyrix 6x86
Encyclopedia
The Cyrix 6x86 is a sixth-generation, 32-bit
80x86-compatible microprocessor
designed by Cyrix
and manufactured by IBM and SGS-Thomson. It was originally released in 1996.
and superpipelined and performs register renaming
, speculative execution
, out-of-order execution
, and data dependency
removal. However, it continued to use native x86 execution and ordinary microcode
only, like Centaur
's Winchip
, unlike competitors Intel and AMD which introduced the method of dynamic translation to micro-operation
s with Pentium Pro
and K5
.
With regard to internal caches, it has a 16-kB
primary cache
and is socket
-compatible with the Intel P54C Pentium. It was also unique in that it was the only x86 design to incorporate a 256-byte Level 0 scratchpad cache. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+. These performance levels do not map to the clock speed of the chip itself (for example, a PR 133+ ran at 110 MHz, a PR 166+ ran at 133 MHz, etc.).
The 6x86 and 6x86L weren't completely compatible with the Intel P5
Pentium instruction set and is not multi-processor capable. For this reason, the chip identified itself as a 80486
and disabled the CPUID
instruction by default. CPUID support could be enabled by first enabling extended CCR registers then setting bit 7 in CCR4. The lack of full P5 Pentium compatibility caused problems with some applications because programmers had begun to use P5 Pentium-specific instructions. Some companies released patches for their products to make them function on the 6x86.
The first generation of 6x86 had heat problems. This was primarily caused by their higher heat output than other x86 CPUs of the day and, as such, computer builders sometimes did not equip them with adequate cooling. The CPUs topped out at around 25 W
heat output (like the AMD K6
), whereas the P5 Pentium produced around 15 W of waste heat at its peak. However, both numbers would be a fraction of the heat generated by many high performance NetBurst Pentium 4
versions, some years later.
to address heat issues; the L standing for low-power. Improved manufacturing technologies permitted usage of a lower Vcore. Just like the Pentium MMX the 6x86L required a split powerplane voltage regulator with separate voltages for I/O and CPU core. Another release of the 6x86, the 6x86MX, added MMX compatibility, introduced the EMMI
instruction set, and quadrupled the primary cache size to 64 KB. Later revisions of this chip were renamed MII, to better compete with the Pentium II processor.
It has been speculated by experts that 6x86 was designed to perform well specifically on business-oriented benchmarks of the time, most notably Ziff-Davis' Winstone benchmark
. Winstone ran various speed tests using several popular applications. It was one of the leading benchmarks during the mid-'90s and was used in some leading magazines, such as Computer Shopper
and PC Magazine
, as a deciding factor for system ratings.
Cyrix used a PR rating
(Performance Rating) to relate their performance to the Intel P5
Pentium (pre-P55C), because a 6x86 at a lower clock rate outperformed the higher-clocked P5 Pentium. For example, a 133 MHz 6x86 will outperform a P5 Pentium at 166 MHz, and as a result Cyrix could market the 133 MHz chip as being a P5 Pentium 166's equal. A PR rating was also necessary because the 6x86 could not clock as high as P5 Pentium and maintain equivalent manufacturing yields, so it was critical to establish the slower clock speeds as equal in the minds of the consumer. However, the PR rating was not an entirely truthful representation of the 6x86's performance.
While the 6x86's integer performance was significantly higher than P5 Pentium's, it's floating point performance was more mediocre—around twice the performance of the 486 FPU per clock cycle. The FPU
in the 6x86 was largely the same circuitry that was developed for Cyrix's earlier high performance 8087/80287/80387-compatible coprocessors, which was very fast for its time—the Cyrix FPU was much faster than the 80387, and even the 80486 FPU. However, it was still considerably slower than the new and completely redesigned P5 Pentium and P6
Pentium Pro
-Pentium III
FPUs. During the 6x86's development, the majority of applications (office software) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget.
The popularity of the P5 Pentium caused many software developer
s to hand-optimize code in assembly language
, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anticipated first person shooter Quake used highly-optimized assembly code designed almost entirely around the P5 Pentium's FPU. As a result, the P5 Pentium significantly outperformed other CPUs in the game. Fortunately for the 6x86 (and AMD K6), many games continued to be integer-based throughout the chip's lifetime.
Pentium II
were always ahead on clock speed. The 6x86's and MII's old generation "486 class" floating point unit combined with an integer section that was at best on-par with the newer P6 and K6 chips meant that Cyrix could no longer compete in performance.
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
80x86-compatible microprocessor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...
designed by Cyrix
Cyrix
Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas as a specialist supplier of high-performance math coprocessors for 286 and 386 microprocessors. The company was founded by former Texas Instruments staff members and had a long but troubled relationship...
and manufactured by IBM and SGS-Thomson. It was originally released in 1996.
Architecture
The 6x86 is superscalarSuperscalar
A superscalar CPU architecture implements a form of parallelism called instruction level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate...
and superpipelined and performs register renaming
Register renaming
In computer architecture, register renaming refers to a technique used to avoid unnecessary serialization of program operations imposed by the reuse of registers by those operations.-Problem definition:...
, speculative execution
Speculative execution
Speculative execution in computer systems is doing work, the result of which may not be needed. This performance optimization technique is used in pipelined processors and other systems.-Main idea:...
, out-of-order execution
Out-of-order execution
In computer engineering, out-of-order execution is a paradigm used in most high-performance microprocessors to make use of instruction cycles that would otherwise be wasted by a certain type of costly delay...
, and data dependency
Data dependency
A data dependency in computer science is a situation in which a program statement refers to the data of a preceding statement. In compiler theory, the technique used to discover data dependencies among statements is called dependence analysis.There are three types of dependencies: data, name, and...
removal. However, it continued to use native x86 execution and ordinary microcode
Microcode
Microcode is a layer of hardware-level instructions and/or data structures involved in the implementation of higher level machine code instructions in many computers and other processors; it resides in special high-speed memory and translates machine instructions into sequences of detailed...
only, like Centaur
Centaur Technology
Centaur Technology is an x86 CPU design company, now a wholly owned subsidiary of VIA Technologies, a member of the Formosa Plastics Group, Taiwan's largest industrial conglomerate.-History:...
's Winchip
WinChip
The WinChip series was a low-power Socket 7-based x86 processor designed by Centaur Technology and marketed by its parent company IDT.-Design:The design of the WinChip was quite different from other processors of the time...
, unlike competitors Intel and AMD which introduced the method of dynamic translation to micro-operation
Micro-operation
In computer central processing units, micro-operations are detailed low-level instructions used in some designs to implement complex machine instructions .Various forms of μops have long been the basis for traditional microcode routines used to simplify the implementation of a...
s with Pentium Pro
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
and K5
AMD K5
The K5 was AMD's first x86 processor to be developed entirely in-house. Introduced in March 1996, its primary competition was Intel's Pentium microprocessor. The K5 was an ambitious design, closer to a Pentium Pro than a Pentium regarding technical solutions and internal architecture...
.
With regard to internal caches, it has a 16-kB
Kilobyte
The kilobyte is a multiple of the unit byte for digital information. Although the prefix kilo- means 1000, the term kilobyte and symbol KB have historically been used to refer to either 1024 bytes or 1000 bytes, dependent upon context, in the fields of computer science and information...
primary cache
CPU cache
A CPU cache is a cache used by the central processing unit of a computer to reduce the average time to access memory. The cache is a smaller, faster memory which stores copies of the data from the most frequently used main memory locations...
and is socket
CPU socket
A CPU socket or CPU slot is a mechanical component that provides mechanical and electrical connections between a microprocessor and a printed circuit board . This allows the CPU to be replaced without soldering....
-compatible with the Intel P54C Pentium. It was also unique in that it was the only x86 design to incorporate a 256-byte Level 0 scratchpad cache. It has six performance levels: PR 90+, PR 120+, PR 133+, PR 150+, PR 166+ and PR 200+. These performance levels do not map to the clock speed of the chip itself (for example, a PR 133+ ran at 110 MHz, a PR 166+ ran at 133 MHz, etc.).
The 6x86 and 6x86L weren't completely compatible with the Intel P5
P5 (microarchitecture)
The original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus,...
Pentium instruction set and is not multi-processor capable. For this reason, the chip identified itself as a 80486
Intel 80486
The Intel 80486 microprocessor was a higher performance follow up on the Intel 80386. Introduced in 1989, it was the first tightly pipelined x86 design as well as the first x86 chip to use more than a million transistors, due to a large on-chip cache and an integrated floating point unit...
and disabled the CPUID
CPUID
The CPUID opcode is a processor supplementary instruction for the x86 architecture. It was introduced by Intel in 1993 when it introduced the Pentium and SL-Enhanced 486 processors....
instruction by default. CPUID support could be enabled by first enabling extended CCR registers then setting bit 7 in CCR4. The lack of full P5 Pentium compatibility caused problems with some applications because programmers had begun to use P5 Pentium-specific instructions. Some companies released patches for their products to make them function on the 6x86.
The first generation of 6x86 had heat problems. This was primarily caused by their higher heat output than other x86 CPUs of the day and, as such, computer builders sometimes did not equip them with adequate cooling. The CPUs topped out at around 25 W
Watt
The watt is a derived unit of power in the International System of Units , named after the Scottish engineer James Watt . The unit, defined as one joule per second, measures the rate of energy conversion.-Definition:...
heat output (like the AMD K6
AMD K6
The K6 microprocessor was launched by AMD in 1997. The main advantage of this particular microprocessor is that it was designed to fit into existing desktop designs for Pentium branded CPUs. It was marketed as a product which could perform as well as its Intel Pentium II equivalent but at a...
), whereas the P5 Pentium produced around 15 W of waste heat at its peak. However, both numbers would be a fraction of the heat generated by many high performance NetBurst Pentium 4
Pentium 4
Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
versions, some years later.
Revised cores
The 6x86L (codename M1L) was later released by CyrixCyrix
Cyrix Corporation was a microprocessor developer that was founded in 1988 in Richardson, Texas as a specialist supplier of high-performance math coprocessors for 286 and 386 microprocessors. The company was founded by former Texas Instruments staff members and had a long but troubled relationship...
to address heat issues; the L standing for low-power. Improved manufacturing technologies permitted usage of a lower Vcore. Just like the Pentium MMX the 6x86L required a split powerplane voltage regulator with separate voltages for I/O and CPU core. Another release of the 6x86, the 6x86MX, added MMX compatibility, introduced the EMMI
Extended MMX
Extended MMX, also known as EMMI , was an instruction set developed by Cyrix and implemented on their 6x86 MX and MII line of processors. It extended the MMX instruction set with 12 new instructions useful in multimedia applications. The extensions were not enabled by default, requiring the BIOS or...
instruction set, and quadrupled the primary cache size to 64 KB. Later revisions of this chip were renamed MII, to better compete with the Pentium II processor.
Performance
Benchmark (computing)
In computing, a benchmark is the act of running a computer program, a set of programs, or other operations, in order to assess the relative performance of an object, normally by running a number of standard tests and trials against it...
. Winstone ran various speed tests using several popular applications. It was one of the leading benchmarks during the mid-'90s and was used in some leading magazines, such as Computer Shopper
Computer Shopper
Computer Shopper could refer to the following publications:* Computer Shopper - a home computer magazine published in the United Kingdom* Computer Shopper - a home computer magazine published in the United States...
and PC Magazine
PC Magazine
PC Magazine is a computer magazine published by Ziff Davis Publishing Holdings Inc. A print edition was published from 1982 to January 2009...
, as a deciding factor for system ratings.
Cyrix used a PR rating
PR rating
The PR system was developed by AMD in the mid-1990s as a method of comparing their x86 processors to those of rival Intel.-Branding:...
(Performance Rating) to relate their performance to the Intel P5
P5 (microarchitecture)
The original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus,...
Pentium (pre-P55C), because a 6x86 at a lower clock rate outperformed the higher-clocked P5 Pentium. For example, a 133 MHz 6x86 will outperform a P5 Pentium at 166 MHz, and as a result Cyrix could market the 133 MHz chip as being a P5 Pentium 166's equal. A PR rating was also necessary because the 6x86 could not clock as high as P5 Pentium and maintain equivalent manufacturing yields, so it was critical to establish the slower clock speeds as equal in the minds of the consumer. However, the PR rating was not an entirely truthful representation of the 6x86's performance.
While the 6x86's integer performance was significantly higher than P5 Pentium's, it's floating point performance was more mediocre—around twice the performance of the 486 FPU per clock cycle. The FPU
Floating point unit
A floating-point unit is a part of a computer system specially designed to carry out operations on floating point numbers. Typical operations are addition, subtraction, multiplication, division, and square root...
in the 6x86 was largely the same circuitry that was developed for Cyrix's earlier high performance 8087/80287/80387-compatible coprocessors, which was very fast for its time—the Cyrix FPU was much faster than the 80387, and even the 80486 FPU. However, it was still considerably slower than the new and completely redesigned P5 Pentium and P6
P6 (microarchitecture)
The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...
Pentium Pro
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
-Pentium III
Pentium III
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors...
FPUs. During the 6x86's development, the majority of applications (office software) performed almost entirely integer operations. The designers foresaw that future applications would most likely maintain this instruction focus. So, to optimize the chip's performance for what they believed to be the most likely application of the CPU, the integer execution resources received most of the transistor budget.
The popularity of the P5 Pentium caused many software developer
Software developer
A software developer is a person concerned with facets of the software development process. Their work includes researching, designing, developing, and testing software. A software developer may take part in design, computer programming, or software project management...
s to hand-optimize code in assembly language
X86 assembly language
x86 assembly language is a family of backward-compatible assembly languages, which provide some level of compatibility all the way back to the Intel 8008. x86 assembly languages are used to produce object code for the x86 class of processors, which includes Intel's Core series and AMD's Phenom and...
, to take advantage of the P5 Pentium's tightly pipelined and lower latency FPU. For example, the highly anticipated first person shooter Quake used highly-optimized assembly code designed almost entirely around the P5 Pentium's FPU. As a result, the P5 Pentium significantly outperformed other CPUs in the game. Fortunately for the 6x86 (and AMD K6), many games continued to be integer-based throughout the chip's lifetime.
Cyrix MII
The 6x86 successor—MII—was late to market, and couldn't scale well in clock speed with the manufacturing processes used at the time. Similar to the AMD K5, the Cyrix 6x86 was a design far more focused on integer per-clock performance than clock scalability, something that proved to be a strategic mistake. Therefore, despite being very fast clock by clock, the 6x86 and MII were forced to compete at the low-end of the market as AMD K6 and Intel P6P6 (microarchitecture)
The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...
Pentium II
Pentium II
The Pentium II brand refers to Intel's sixth-generation microarchitecture and x86-compatible microprocessors introduced on May 7, 1997. Containing 7.5 million transistors, the Pentium II featured an improved version of the first P6-generation core of the Pentium Pro, which contained 5.5 million...
were always ahead on clock speed. The 6x86's and MII's old generation "486 class" floating point unit combined with an integer section that was at best on-par with the newer P6 and K6 chips meant that Cyrix could no longer compete in performance.
External links
- Cyrix 6x86 ("M1") at PCGuide
- cpu-collection.de Cyrix 6x86 processor images and descriptions
- Paul Hsieh's 6th Generation x86 CPU Comparison in-depth analysis of 6th generation x86 CPUs, including the 6x86MX.
- Cyrix M1 stats at Sandpile.org