NetBurst
Encyclopedia
The NetBurst microarchitecture, called P68 inside Intel, was the successor to the P6 microarchitecture
in the x86 family of CPU
s made by Intel. The first CPU to use this architecture was the Willamette core of the Pentium 4, released on November 20, 2000 and the first of the Pentium 4
CPUs; all subsequent Pentium 4 and Pentium D
variants have also been based on NetBurst. In mid 2001, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon
CPUs to the new architecture as well. Pentium 4-based Celeron
CPUs also use the NetBurst architecture.
makes a mistake, increasing the penalty paid for a mis-prediction. To address this issue, Intel devised the Rapid Execution Engine and has invested a great deal into its branch prediction technology, which Intel claims reduces mis-predictions by 33% over Pentium III
.
in the core of the CPU are double-pumped, meaning that they actually operate at twice the core clock frequency. For example, in a 3.8 GHz processor, the ALUs will effectively be operating at 7.6 GHz. The reason behind this is to generally make up for the low IPC count; additionally this considerably enhances the integer performance of the CPU. Intel also replaced the high-speed barrel shifter
with a shift/rotate execution unit that operates at the same frequency as the CPU core. The downside is that certain instructions are now much slower (relatively and absolutely) than before, making optimization for multiple target CPUs difficult. An example is shift and rotate operations, which suffer from the lack of a barrel shifter which was present on every x86 CPU beginning with the i386 (and is also present in the Athlon
).
s, so that when executing a new instruction, instead of fetching and decoding the instruction again, the CPU directly accesses the decoded micro-ops from the trace cache, thereby saving considerable time. Moreover, the micro-ops are cached in their predicted path of execution, which means that when instructions are fetched by the CPU from the cache, they are already present in the correct order of execution.
Despite these enhancements, the NetBurst architecture created obstacles for engineers trying to scale up its performance. With this microarchitecture, Intel looked to attain clock speeds of 10 GHz, but because of rising clock speeds, Intel faced increasing problems with keeping power dissipation within acceptable limits. Intel reached a speed barrier of 3.8 GHz in November 2004 but encountered problems trying to achieve even that. Intel abandoned NetBurst in 2006 after the heat problems reached a level of severity and then developed Core microarchitecture, inspired by the P6 Core of the Pentium Pro
to the Tualatin Pentium III
-S and most directly the Pentium M
.
Intel replaced the original Willamette core with a redesigned version of the NetBurst microarchitecture called Northwood in January 2002. The Northwood design combined an increased cache size, a smaller 130 nm fabrication process, and Hyper-Threading Technology (although initially all models but the 3.06 GHz model had this feature disabled) to produce a more modern, higher-performing version of the NetBurst microarchitecture.
In February 2004, Intel introduced another, more radical revision of the microarchitecture codenamed Prescott. The Prescott core was produced on a 90 nm process, and included several major design changes, including the addition of an even larger cache (from 512 KB in the Northwood to 1 MB, and 2 MB in Prescott 2M), a much deeper instruction pipeline
(31 stages as compared to 20 in the Northwood), a heavily improved branch predictor
, the introduction of the SSE3
instructions, and later, the implementation of Intel 64, Intel's branding for their compatible implementation of the x86-64
64-bit version of the x86 microarchitecture (as with Hyper-Threading
, all Prescott chips branded Pentium 4 HT have hardware to support this feature, but it was initially only enabled on the high-end Xeon
processors, before being officially introduced in processors with the Pentium
trademark). Despite having many new features, the Prescott often performed worse than a similarly-clocked Northwood, and many engineers felt that the real-world performance of the processor was compromised by attempting to achieve the highest clock speed possible. Power consumption and heat dissipation also became major issues with Prescott, which quickly became the hottest-running, and most power-hungry, of Intel's single-core x86 and x86-64 processors. Power and heat concerns have thus far prevented Intel from releasing a Prescott clocked above 3.8 GHz, along with a mobile version of the core clocked above 3.46 GHz.
Intel has also released a dual-core processor based on the NetBurst microarchitecture branded Pentium D. The first Pentium D core was codenamed Smithfield, which is actually two Prescott cores in a single die, and later Presler, which consists of two Cedar Mill cores on two separate dies (Cedar Mill being the 65 nm die-shrink of Prescott).
than it is from NetBurst. August 8, 2008 marked the end of Intel NetBurst based processors. The reason for NetBurst's abandonment was the severe heat problems caused by high clock speeds. While Core- and Nehalem-based processors have higher TDP
s, most processors are multi-core, so each core gives off a fraction of the maximum TDP, and the highest-clocked Core-based single-core processors give off a maximum of 27 W of heat. The fastest-clocked desktop Pentium 4 processors (single-core) had TDPs of 115 W, compared to 88 W for the fastest clocked mobile versions. Although, with the introduction of new steppings, TDPs for some models were eventually lowered.
Presler, a Pentium D
core released in early 2006, is widely touted by analysts to be the last in the line of NetBurst, although the actual final NetBurst processor released was the Celeron
D 365, which was released in 2007 and clocked at 3.6 GHz. The Conroe
core of the first Intel Core 2 Duo processor, using the Core microarchitecture, is the successor to Presler.
The Nehalem microarchitecture, the successor to the Core microarchitecture, was actually supposed to be an evolution of NetBurst according to Intel roadmaps dating back to 2000. But due to NetBurst's abandonment, Nehalem is now a completely different project, but has some similarities with NetBurst. Nehalem reimplements the Hyper-threading Technology first introduced in the 3.06 GHz Northwood core of Pentium 4. Nehalem also implements an L3 cache in processors based on it. For a consumer processor implementation, an L3 cache was first used in the Gallatin core of Pentium 4 Extreme Edition, but was oddly missing from Prescott 2M core of the same brand.
P6 (microarchitecture)
The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...
in the x86 family of CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
s made by Intel. The first CPU to use this architecture was the Willamette core of the Pentium 4, released on November 20, 2000 and the first of the Pentium 4
Pentium 4
Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
CPUs; all subsequent Pentium 4 and Pentium D
Pentium D
The Pentium D brand refers to two series of desktop dual-core 64-bit x86-64 microprocessors with the NetBurst microarchitecture manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to each other on a multi-chip module package. The brand's first processor,...
variants have also been based on NetBurst. In mid 2001, Intel released the Foster core, which was also based on NetBurst, thus switching the Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...
CPUs to the new architecture as well. Pentium 4-based Celeron
Celeron
Celeron is a brand name given by Intel Corp. to a number of different x86 computer microprocessor models targeted at budget personal computers....
CPUs also use the NetBurst architecture.
Technology
The NetBurst microarchitecture includes features such as Hyper Pipelined Technology and Rapid Execution Engine which are firsts in this particular microarchitecture.Hyper Pipelined Technology
Intel chose this name for the 20-stage pipeline within the Willamette core. This is a significant increase in the number of stages when compared to the Pentium III, which had only 10 stages in its pipeline. The Prescott core has a 31-stage pipeline. Although a deeper pipeline has some disadvantages (primarily due to increased branch misprediction penalty) the greater number of stages in the pipeline allow the CPU to have higher clock speeds which was thought to offset any loss in performance. A smaller instructions per clock (IPC) is an indirect consequence of pipeline depth—a matter of design compromise (a small number of long pipelines has a smaller IPC than a greater number of short pipelines). Another drawback of having more stages in a pipeline is an increase in the number of stages that need to be traced back in the event that the branch predictorBranch predictor
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the branch predictor is to improve the flow in the instruction pipeline...
makes a mistake, increasing the penalty paid for a mis-prediction. To address this issue, Intel devised the Rapid Execution Engine and has invested a great deal into its branch prediction technology, which Intel claims reduces mis-predictions by 33% over Pentium III
Pentium III
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors...
.
Rapid Execution Engine
With this technology, the two ALUsArithmetic logic unit
In computing, an arithmetic logic unit is a digital circuit that performs arithmetic and logical operations.The ALU is a fundamental building block of the central processing unit of a computer, and even the simplest microprocessors contain one for purposes such as maintaining timers...
in the core of the CPU are double-pumped, meaning that they actually operate at twice the core clock frequency. For example, in a 3.8 GHz processor, the ALUs will effectively be operating at 7.6 GHz. The reason behind this is to generally make up for the low IPC count; additionally this considerably enhances the integer performance of the CPU. Intel also replaced the high-speed barrel shifter
Barrel shifter
A barrel shifter is a digital circuit that can shift a data word by a specified number of bits in one clock cycle. It can be implemented as a sequence of multiplexers , and in such an implementation the output of one mux is connected to the input of the next mux in a way that depends on the shift...
with a shift/rotate execution unit that operates at the same frequency as the CPU core. The downside is that certain instructions are now much slower (relatively and absolutely) than before, making optimization for multiple target CPUs difficult. An example is shift and rotate operations, which suffer from the lack of a barrel shifter which was present on every x86 CPU beginning with the i386 (and is also present in the Athlon
Athlon
Athlon is the brand name applied to a series of x86-compatible microprocessors designed and manufactured by Advanced Micro Devices . The original Athlon was the first seventh-generation x86 processor and, in a first, retained the initial performance lead it had over Intel's competing processors...
).
Execution Trace Cache
Within the L1 cache of the CPU, Intel incorporated its Execution Trace Cache. It stores decoded micro-operationMicro-operation
In computer central processing units, micro-operations are detailed low-level instructions used in some designs to implement complex machine instructions .Various forms of μops have long been the basis for traditional microcode routines used to simplify the implementation of a...
s, so that when executing a new instruction, instead of fetching and decoding the instruction again, the CPU directly accesses the decoded micro-ops from the trace cache, thereby saving considerable time. Moreover, the micro-ops are cached in their predicted path of execution, which means that when instructions are fetched by the CPU from the cache, they are already present in the correct order of execution.
Despite these enhancements, the NetBurst architecture created obstacles for engineers trying to scale up its performance. With this microarchitecture, Intel looked to attain clock speeds of 10 GHz, but because of rising clock speeds, Intel faced increasing problems with keeping power dissipation within acceptable limits. Intel reached a speed barrier of 3.8 GHz in November 2004 but encountered problems trying to achieve even that. Intel abandoned NetBurst in 2006 after the heat problems reached a level of severity and then developed Core microarchitecture, inspired by the P6 Core of the Pentium Pro
Pentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
to the Tualatin Pentium III
Pentium III
The Pentium III brand refers to Intel's 32-bit x86 desktop and mobile microprocessors based on the sixth-generation P6 microarchitecture introduced on February 26, 1999. The brand's initial processors were very similar to the earlier Pentium II-branded microprocessors...
-S and most directly the Pentium M
Pentium M
The Pentium M brand refers to a family of mobile single-core x86 microprocessors introduced in March 2003 , and forming a part of the Intel Carmel notebook platform under the then new Centrino brand...
.
Revisions
| Revision | Processor Brand(s) | Pipeline stages |
|---|---|---|
| Willamette (180 nm) | Celeron, Pentium 4 | 20 |
| Northwood (130 nm) | Celeron, Pentium 4, Pentium 4 HT | 20 |
| Gallatin (130 nm) | Pentium 4 HT Extreme Edition, Xeon | 20 |
| Prescott (90 nm) | Celeron D, Pentium 4, Pentium 4 HT, Pentium 4 Extreme Edition | 31 |
| Cedar Mill (65 nm) | Celeron D, Pentium 4 | 31 |
| Smithfield (90 nm) | Pentium D | 31 |
| Presler (65 nm) | Pentium D | 31 |
Intel replaced the original Willamette core with a redesigned version of the NetBurst microarchitecture called Northwood in January 2002. The Northwood design combined an increased cache size, a smaller 130 nm fabrication process, and Hyper-Threading Technology (although initially all models but the 3.06 GHz model had this feature disabled) to produce a more modern, higher-performing version of the NetBurst microarchitecture.
In February 2004, Intel introduced another, more radical revision of the microarchitecture codenamed Prescott. The Prescott core was produced on a 90 nm process, and included several major design changes, including the addition of an even larger cache (from 512 KB in the Northwood to 1 MB, and 2 MB in Prescott 2M), a much deeper instruction pipeline
Instruction pipeline
An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput ....
(31 stages as compared to 20 in the Northwood), a heavily improved branch predictor
Branch predictor
In computer architecture, a branch predictor is a digital circuit that tries to guess which way a branch will go before this is known for sure. The purpose of the branch predictor is to improve the flow in the instruction pipeline...
, the introduction of the SSE3
SSE3
SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...
instructions, and later, the implementation of Intel 64, Intel's branding for their compatible implementation of the x86-64
X86-64
x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...
64-bit version of the x86 microarchitecture (as with Hyper-Threading
Hyper-threading
Hyper-threading is Intel's term for its simultaneous multithreading implementation in its Atom, Intel Core i3/i5/i7, Itanium, Pentium 4 and Xeon CPUs....
, all Prescott chips branded Pentium 4 HT have hardware to support this feature, but it was initially only enabled on the high-end Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...
processors, before being officially introduced in processors with the Pentium
Pentium
The original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus,...
trademark). Despite having many new features, the Prescott often performed worse than a similarly-clocked Northwood, and many engineers felt that the real-world performance of the processor was compromised by attempting to achieve the highest clock speed possible. Power consumption and heat dissipation also became major issues with Prescott, which quickly became the hottest-running, and most power-hungry, of Intel's single-core x86 and x86-64 processors. Power and heat concerns have thus far prevented Intel from releasing a Prescott clocked above 3.8 GHz, along with a mobile version of the core clocked above 3.46 GHz.
Intel has also released a dual-core processor based on the NetBurst microarchitecture branded Pentium D. The first Pentium D core was codenamed Smithfield, which is actually two Prescott cores in a single die, and later Presler, which consists of two Cedar Mill cores on two separate dies (Cedar Mill being the 65 nm die-shrink of Prescott).
Successor
Intel has replaced NetBurst with the Core microarchitecture, released in July 2006, which is more directly derived from 1995's Pentium ProPentium Pro
The Pentium Pro is a sixth-generation x86 microprocessor developed and manufactured by Intel introduced in November 1, 1995 . It introduced the P6 microarchitecture and was originally intended to replace the original Pentium in a full range of applications...
than it is from NetBurst. August 8, 2008 marked the end of Intel NetBurst based processors. The reason for NetBurst's abandonment was the severe heat problems caused by high clock speeds. While Core- and Nehalem-based processors have higher TDP
Thermal Design Power
The thermal design power , sometimes called thermal design point, refers to the maximum amount of power the cooling system in a computer is required to dissipate. For example, a laptop's CPU cooling system may be designed for a 20 watt TDP, which means that it can dissipate up to 20 watts of heat...
s, most processors are multi-core, so each core gives off a fraction of the maximum TDP, and the highest-clocked Core-based single-core processors give off a maximum of 27 W of heat. The fastest-clocked desktop Pentium 4 processors (single-core) had TDPs of 115 W, compared to 88 W for the fastest clocked mobile versions. Although, with the introduction of new steppings, TDPs for some models were eventually lowered.
Presler, a Pentium D
Pentium D
The Pentium D brand refers to two series of desktop dual-core 64-bit x86-64 microprocessors with the NetBurst microarchitecture manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to each other on a multi-chip module package. The brand's first processor,...
core released in early 2006, is widely touted by analysts to be the last in the line of NetBurst, although the actual final NetBurst processor released was the Celeron
Celeron
Celeron is a brand name given by Intel Corp. to a number of different x86 computer microprocessor models targeted at budget personal computers....
D 365, which was released in 2007 and clocked at 3.6 GHz. The Conroe
Conroe (microprocessor)
Conroe is the code name for many Intel processors sold as Core 2 Duo, Xeon, Pentium Dual-Core and Celeron. It was the first desktop processor to be based on the Core microarchitecture, replacing the NetBurst microarchitecture based Cedar Mill processor. It has product code 80557, which is shared...
core of the first Intel Core 2 Duo processor, using the Core microarchitecture, is the successor to Presler.
The Nehalem microarchitecture, the successor to the Core microarchitecture, was actually supposed to be an evolution of NetBurst according to Intel roadmaps dating back to 2000. But due to NetBurst's abandonment, Nehalem is now a completely different project, but has some similarities with NetBurst. Nehalem reimplements the Hyper-threading Technology first introduced in the 3.06 GHz Northwood core of Pentium 4. Nehalem also implements an L3 cache in processors based on it. For a consumer processor implementation, an L3 cache was first used in the Gallatin core of Pentium 4 Extreme Edition, but was oddly missing from Prescott 2M core of the same brand.
NetBurst based chips
- Celeron (NetBurst)
- Celeron D
- Pentium 4Pentium 4Pentium 4 was a line of single-core desktop and laptop central processing units , introduced by Intel on November 20, 2000 and shipped through August 8, 2008. They had a 7th-generation x86 microarchitecture, called NetBurst, which was the company's first all-new design since the introduction of the...
- Pentium 4 Extreme Edition
- Pentium DPentium DThe Pentium D brand refers to two series of desktop dual-core 64-bit x86-64 microprocessors with the NetBurst microarchitecture manufactured by Intel. Each CPU comprised two dies, each containing a single core, residing next to each other on a multi-chip module package. The brand's first processor,...
- Pentium Extreme Edition
- XeonXeonThe Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...
, since 2001 through 2006
See also
- x86 architectureX86 architectureThe term x86 refers to a family of instruction set architectures based on the Intel 8086 CPU. The 8086 was launched in 1978 as a fully 16-bit extension of Intel's 8-bit based 8080 microprocessor and also introduced segmentation to overcome the 16-bit addressing barrier of such designs...
- x86-64X86-64x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...
- Replay systemReplay systemThe Replay system is a little known subsystem within the Intel Pentium 4 processor. Its primary function is to catch operations that have been mistakenly sent for execution by the processor's scheduler...
- P5P5 (microarchitecture)The original Pentium microprocessor was introduced on March 22, 1993. Its microarchitecture, deemed P5, was Intel's fifth-generation and first superscalar x86 microarchitecture. As a direct extension of the 80486 architecture, it included dual integer pipelines, a faster FPU, wider data bus,...
- P6P6 (microarchitecture)The P6 microarchitecture is the sixth generation Intel x86 microarchitecture, implemented by the Pentium Pro microprocessor that was introduced in November 1995. It is sometimes referred to as i686. It was succeeded by the NetBurst microarchitecture in 2000, but eventually revived in the Pentium M...
- Core
- Nehalem
- Sandy BridgeSandy Bridge (microarchitecture)Sandy Bridge is the codename for a microarchitecture developed by Intel beginning in 2005 for central processing units in computers to replace the Nehalem microarchitecture...
- List of Intel CPU microarchitectures
- List of Intel Celeron microprocessors
- List of Intel Pentium 4 microprocessors
- List of Intel Pentium D microprocessors
- List of Intel Xeon microprocessors