Double data rate
Encyclopedia
In computing
, a computer bus
operating with double data rate transfers data on both the rising and falling edges of the clock signal
. This is also known as double pumped, dual-pumped, and double transition.
The simplest way to design a clocked electronic circuit
is to make it perform one transfer per full cycle (rise and fall) of a clock signal
. This, however, requires that the clock signal changes twice per transfer, while the data lines change at most once per transfer. When operating at a high bandwidth, signal integrity
limitations constrain the clock frequency
. By using both edges of the clock, the data signals operate with the same limiting frequency, thereby doubling the data transmission rate.
This technique has been used for microprocessor front side bus
ses, Ultra-3 SCSI, graphics ram (the AGP
bus and GDDR
), main memory
(both RDRAM
and DDR1
through DDR4
), and the HyperTransport
bus on AMD's Athlon 64
processors. It is more recently being used for other systems with high data transfer speed requirements - e.g. for the output of analog-to-digital converter
s (ADCs).
DDR should not be confused with dual channel
, in which each memory channel accesses two RAM modules simultaneously. The two technologies are independent of each other and many motherboards use both, by using DDR memory in a dual channel configuration.
An alternative to double or quad pumping
is to make the link self-clocking
. This tactic was chosen by InfiniBand
and PCI Express
.
Describing the bandwidth of a double-pumped bus can be confusing. Each clock edge is referred to as a "beat
", with two beats (one upbeat and one downbeat) per cycle. Technically, the hertz
is a unit of cycles per second, but many people refer to the number of transfers per second. Careful usage generally talks about "500 MHz, double data rate" or "1000 MT/s", but people will refer casually to a "1000 MHz bus", even though no signal cycles faster than 500 MHz.
DDR SDRAM
popularized the technique of referring to the bus bandwidth in megabytes per second, the product of the transfer rate and the bus width in bytes. DDR SDRAM operating with a 100 MHz clock is called DDR-200 (after its 200 MT/s data transfer rate), and a 64 bit (8 byte) wide DIMM
operated at that data rate is called PC-1600, after its 1600 MB/s peak (theoretical) bandwidth. Likewise, 800 MHz clock DDR3-1600 is called PC3-12800.
Note that DDR SDRAM only uses double-data-rate signalling
on the data lines. Address and control signals are still sent to the DRAM once per clock cycle (to be precise, on the rising edge of the clock), and timing parameters such as CAS latency
are specified in clock cycles. (Some less common DRAM interfaces, notably LPDDR2, GDDR5
and XDR DRAM
, send commands and addresses using double data rate.)
Computing
Computing is usually defined as the activity of using and improving computer hardware and software. It is the computer-specific part of information technology...
, a computer bus
Computer bus
In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same...
operating with double data rate transfers data on both the rising and falling edges of the clock signal
Clock signal
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is utilized like a metronome to coordinate actions of circuits...
. This is also known as double pumped, dual-pumped, and double transition.
The simplest way to design a clocked electronic circuit
Electronic circuit
An electronic circuit is composed of individual electronic components, such as resistors, transistors, capacitors, inductors and diodes, connected by conductive wires or traces through which electric current can flow...
is to make it perform one transfer per full cycle (rise and fall) of a clock signal
Clock signal
In electronics and especially synchronous digital circuits, a clock signal is a particular type of signal that oscillates between a high and a low state and is utilized like a metronome to coordinate actions of circuits...
. This, however, requires that the clock signal changes twice per transfer, while the data lines change at most once per transfer. When operating at a high bandwidth, signal integrity
Signal integrity
Signal integrity or SI is a set of measures of the quality of an electrical signal. In digital electronics, a stream of binary values is represented by a voltage waveform. However, digital signals are fundamentally analog in nature, and all signals are subject to effects such as noise,...
limitations constrain the clock frequency
Frequency
Frequency is the number of occurrences of a repeating event per unit time. It is also referred to as temporal frequency.The period is the duration of one cycle in a repeating event, so the period is the reciprocal of the frequency...
. By using both edges of the clock, the data signals operate with the same limiting frequency, thereby doubling the data transmission rate.
This technique has been used for microprocessor front side bus
Front side bus
A front-side bus is a computer communication interface often used in computers during the 1990s and 2000s.It typically carries data between the central processing unit and a memory controller hub, known as the northbridge....
ses, Ultra-3 SCSI, graphics ram (the AGP
Accelerated Graphics Port
The Accelerated Graphics Port is a high-speed point-to-point channel for attaching a video card to a computer's motherboard, primarily to assist in the acceleration of 3D computer graphics. Since 2004 AGP has been progressively phased out in favor of PCI Express...
bus and GDDR
GDDR
GDDR or Graphic Double Data Rate memory refers to memory specifically designed for use on graphics cards. GDDR is distinct from the more widely known DDR SDRAM types such as DDR3, although they share some technologies - including double data rate design - in common...
), main memory
SDRAM
Synchronous dynamic random access memory is dynamic random access memory that is synchronized with the system bus. Classic DRAM has an asynchronous interface, which means that it responds as quickly as possible to changes in control inputs...
(both RDRAM
RDRAM
Direct Rambus DRAM or DRDRAM is a type of synchronous dynamic RAM. RDRAM was developed by Rambus inc., in the mid-1990s as a replacement for then-prevalent DIMM SDRAM memory architecture....
and DDR1
DDR SDRAM
Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...
through DDR4
DDR4 SDRAM
In computing, DDR4 SDRAM, an abbreviation for double data rate type four synchronous dynamic random-access memory, is a type of dynamic random-access memory with a high bandwidth interface currently under development and expected market release in 2012. As a "next generation" successor to DDR3...
), and the HyperTransport
HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...
bus on AMD's Athlon 64
Athlon 64
The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP...
processors. It is more recently being used for other systems with high data transfer speed requirements - e.g. for the output of analog-to-digital converter
Analog-to-digital converter
An analog-to-digital converter is a device that converts a continuous quantity to a discrete time digital representation. An ADC may also provide an isolated measurement...
s (ADCs).
DDR should not be confused with dual channel
Dual-channel architecture
Multi-channel architecture is a technology that increases the transfer speed of data between the RAM and the memory controller by adding more channels of communication between them. Theoretically this multiplies the data rate by exactly the number of channels present. Dual-channel memory employs...
, in which each memory channel accesses two RAM modules simultaneously. The two technologies are independent of each other and many motherboards use both, by using DDR memory in a dual channel configuration.
An alternative to double or quad pumping
Quad Data Rate
Quad data rate is a communication signaling technique wherein data are transmitted at four points in the clock cycle: on the rising and falling edges, and at two intermediate points between them. The intermediate points are defined by a 2nd clock that is 90° out of phase from the first...
is to make the link self-clocking
Self-clocking signal
In telecommunications and electronics, a self-clocking signal is one that can be decoded without the need for a separate clock signal or other source of synchronization...
. This tactic was chosen by InfiniBand
InfiniBand
InfiniBand is a switched fabric communications link used in high-performance computing and enterprise data centers. Its features include high throughput, low latency, quality of service and failover, and it is designed to be scalable...
and PCI Express
PCI Express
PCI Express , officially abbreviated as PCIe, is a computer expansion card standard designed to replace the older PCI, PCI-X, and AGP bus standards...
.
Describing the bandwidth of a double-pumped bus can be confusing. Each clock edge is referred to as a "beat
Beat (music)
The beat is the basic unit of time in music, the pulse of the mensural level . In popular use, the beat can refer to a variety of related concepts including: tempo, meter, rhythm and groove...
", with two beats (one upbeat and one downbeat) per cycle. Technically, the hertz
Hertz
The hertz is the SI unit of frequency defined as the number of cycles per second of a periodic phenomenon. One of its most common uses is the description of the sine wave, particularly those used in radio and audio applications....
is a unit of cycles per second, but many people refer to the number of transfers per second. Careful usage generally talks about "500 MHz, double data rate" or "1000 MT/s", but people will refer casually to a "1000 MHz bus", even though no signal cycles faster than 500 MHz.
DDR SDRAM
DDR SDRAM
Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...
popularized the technique of referring to the bus bandwidth in megabytes per second, the product of the transfer rate and the bus width in bytes. DDR SDRAM operating with a 100 MHz clock is called DDR-200 (after its 200 MT/s data transfer rate), and a 64 bit (8 byte) wide DIMM
DIMM
A DIMM or dual in-line memory module, comprises a series of dynamic random-access memory integrated circuits. These modules are mounted on a printed circuit board and designed for use in personal computers, workstations and servers...
operated at that data rate is called PC-1600, after its 1600 MB/s peak (theoretical) bandwidth. Likewise, 800 MHz clock DDR3-1600 is called PC3-12800.
Note that DDR SDRAM only uses double-data-rate signalling
Signalling (telecommunications)
In telecommunication, signaling has the following meanings:*the use of signals for controlling communications...
on the data lines. Address and control signals are still sent to the DRAM once per clock cycle (to be precise, on the rising edge of the clock), and timing parameters such as CAS latency
CAS Latency
Column Address Strobe latency, or CL, is the delay time between the moment a memory controller tells the memory module to access a particular memory column on a RAM memory module, and the moment the data from given array location is available on the module's output pins...
are specified in clock cycles. (Some less common DRAM interfaces, notably LPDDR2, GDDR5
GDDR5
GDDR5 SDRAM is a type of high performance DRAM graphics card memory designed for computer applications requiring high bandwidth...
and XDR DRAM
XDR DRAM
XDR DRAM or extreme data rate dynamic random access memory is a high-performance RAM interface and successor to the Rambus RDRAM it is based on, competing with the rival DDR2 SDRAM and GDDR4 technology. XDR was designed to be effective in small, high-bandwidth consumer systems, high-performance...
, send commands and addresses using double data rate.)
See also
- DDR SDRAMDDR SDRAMDouble data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...
, DDR2 SDRAMDDR2 SDRAMDDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. It supersedes the original DDR SDRAM specification and has itself been superseded by DDR3 SDRAM...
, and DDR3 SDRAMDDR3 SDRAMIn computing, DDR3 SDRAM, an abbreviation for double data rate type three synchronous dynamic random access memory, is a modern kind of dynamic random access memory with a high bandwidth interface. It is one of several variants of DRAM and associated interface techniques used since the early 1970s...
which all use DDR signalling - Quad data rateQuad Data RateQuad data rate is a communication signaling technique wherein data are transmitted at four points in the clock cycle: on the rising and falling edges, and at two intermediate points between them. The intermediate points are defined by a 2nd clock that is 90° out of phase from the first...
- Pumping (computer systems)Pumping (computer systems)Pumping, when referring to computer systems, is simply how many times per clock cycle data is being transmitted. Early types of system memory , such as SDRAM, transmitted data on only the rising edge of the clock. With the advent of double data rate synchronous dynamic RAM or DDR SDRAM, the data...