Opteron
Encyclopedia
Opteron is AMD
Advanced Micro Devices
Advanced Micro Devices, Inc. or AMD is an American multinational semiconductor company based in Sunnyvale, California, that develops computer processors and related technologies for commercial and consumer markets...

's x86 server and workstation processor
Microprocessor
A microprocessor incorporates the functions of a computer's central processing unit on a single integrated circuit, or at most a few integrated circuits. It is a multipurpose, programmable device that accepts digital data as input, processes it according to instructions stored in its memory, and...

 line, and was the first processor which supported the AMD64 instruction set architecture (known generically as x86-64
X86-64
x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...

). It was released on April 22, 2003 with the SledgeHammer core (K8) and was intended to compete in the server
Server (computing)
In the context of client-server architecture, a server is a computer program running to serve the requests of other programs, the "clients". Thus, the "server" performs some computational task on behalf of "clients"...

 and workstation
Workstation
A workstation is a high-end microcomputer designed for technical or scientific applications. Intended primarily to be used by one person at a time, they are commonly connected to a local area network and run multi-user operating systems...

 markets, particularly in the same segment as the Intel Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...

 processor. Processors based on the AMD K10
AMD K10
The AMD Family 10h is a microprocessor microarchitecture by AMD. Though there were once reports that the K10 had been canceled, the first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November...

 microarchitecture (codenamed Barcelona) were announced on September 10, 2007 featuring a new quad-core configuration. The most-recently released Opteron CPUs are the 8- and 12-core Socket G34 Opterons, code-named "Magny-Cours.".

Two key capabilities

Opteron combines two important capabilities in a single processor:
  1. native execution of legacy x86 32-bit
    32-bit
    The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....

     applications without speed penalties
  2. native execution of x86-64 64-bit
    64-bit
    64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...

     applications


The first capability is notable because at the time of Opteron's introduction, the only other 64-bit
64-bit
64-bit is a word size that defines certain classes of computer architecture, buses, memory and CPUs, and by extension the software that runs on them. 64-bit CPUs have existed in supercomputers since the 1970s and in RISC-based workstations and servers since the early 1990s...

 architecture marketed with 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....

 x86 compatibility (Intel's Itanium
Itanium
Itanium is a family of 64-bit Intel microprocessors that implement the Intel Itanium architecture . Intel markets the processors for enterprise servers and high-performance computing systems...

) ran x86 legacy-applications only with significant speed degradation. The second capability, by itself, is less noteworthy, as major RISC architectures such as (SPARC
SPARC
SPARC is a RISC instruction set architecture developed by Sun Microsystems and introduced in mid-1987....

, Alpha
DEC Alpha
Alpha, originally known as Alpha AXP, is a 64-bit reduced instruction set computer instruction set architecture developed by Digital Equipment Corporation , designed to replace the 32-bit VAX complex instruction set computer ISA and its implementations. Alpha was implemented in microprocessors...

, PA-RISC
PA-RISC
PA-RISC is an instruction set architecture developed by Hewlett-Packard. As the name implies, it is a reduced instruction set computer architecture, where the PA stands for Precision Architecture...

, PowerPC
PowerPC
PowerPC is a RISC architecture created by the 1991 Apple–IBM–Motorola alliance, known as AIM...

, MIPS
MIPS architecture
MIPS is a reduced instruction set computer instruction set architecture developed by MIPS Technologies . The early MIPS architectures were 32-bit, and later versions were 64-bit...

) have been 64-bit for many years. In combining these two capabilities, however, the Opteron earned recognition for its ability to run the vast installed base of x86 applications economically, while simultaneously offering an upgrade-path to 64-bit computing.

The Opteron processor possesses an integrated memory controller
Memory controller
The memory controller is a digital circuit which manages the flow of data going to and from the main memory. It can be a separate chip or integrated into another chip, such as on the die of a microprocessor...

 supporting DDR SDRAM
DDR SDRAM
Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...

, DDR2 SDRAM
DDR2 SDRAM
DDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. It supersedes the original DDR SDRAM specification and has itself been superseded by DDR3 SDRAM...

 or DDR3 SDRAM
DDR3 SDRAM
In computing, DDR3 SDRAM, an abbreviation for double data rate type three synchronous dynamic random access memory, is a modern kind of dynamic random access memory with a high bandwidth interface. It is one of several variants of DRAM and associated interface techniques used since the early 1970s...

 (depending on processor generation). This both reduces the latency penalty for accessing the main RAM
Ram
-Animals:*Ram, an uncastrated male sheep*Ram cichlid, a species of freshwater fish endemic to Colombia and Venezuela-Military:*Battering ram*Ramming, a military tactic in which one vehicle runs into another...

 and eliminates the need for a separate northbridge
Northbridge (computing)
The northbridge has historically been one of the two chips in the core logic chipset on a PC motherboard, the other being the southbridge. Increasingly these functions have migrated to the CPU chip itself, beginning with memory and graphics controllers. For Intel Sandy Bridge and AMD Fusion...

 chip.

Multi-processor features

In multi-processor systems (more than one Opteron on a single motherboard
Motherboard
In personal computers, a motherboard is the central printed circuit board in many modern computers and holds many of the crucial components of the system, providing connectors for other peripherals. The motherboard is sometimes alternatively known as the mainboard, system board, or, on Apple...

), the CPUs
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...

 communicate using the Direct Connect Architecture
Direct Connect Architecture
The Direct Connect Architecture is the I/O architecture of the Athlon 64 X2, Opteron, and Phenom microprocessors from AMD. It consists of the combination of three elements:...

 over high-speed HyperTransport
HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

 links. Each CPU can access the main memory of another processor, transparent to the programmer. The Opteron approach to multi-processing is not the same as standard symmetric multiprocessing
Symmetric multiprocessing
In computing, symmetric multiprocessing involves a multiprocessor computer hardware architecture where two or more identical processors are connected to a single shared main memory and are controlled by a single OS instance. Most common multiprocessor systems today use an SMP architecture...

; instead of having one bank of memory for all CPUs, each CPU has its own memory. Thus the Opteron is a Non-Uniform Memory Access
Non-Uniform Memory Access
Non-Uniform Memory Access is a computer memory design used in Multiprocessing, where the memory access time depends on the memory location relative to a processor...

 (NUMA) architecture. The Opteron CPU directly supports up to an 8-way configuration, which can be found in mid-level servers. Enterprise-level servers use additional (and expensive) routing chips to support more than 8 CPUs per box.

In a variety of computing benchmarks, the Opteron architecture has demonstrated better multi-processor scaling than the Intel Xeon
Xeon
The Xeon is a brand of multiprocessing- or multi-socket-capable x86 microprocessors from Intel Corporation targeted at the non-consumer server, workstation and embedded system markets.-Overview:...

. This is primarily because adding an additional Opteron processor increases memory bandwidth, while that is not always the case for Xeon systems, and the fact that the Opterons use a switched fabric
Switched fabric
Switched fabric, switching fabric, or just fabric, is a network topology where network nodes connect with each other via one or more network switches . The term is popular in telecommunication, Fibre Channel storage area networks and other high-speed networks, including InfiniBand...

, rather than a shared bus. In particular, the Opteron's integrated memory controller allows the CPU to access local RAM
Ram
-Animals:*Ram, an uncastrated male sheep*Ram cichlid, a species of freshwater fish endemic to Colombia and Venezuela-Military:*Battering ram*Ramming, a military tactic in which one vehicle runs into another...

 very quickly. In contrast, multiprocessor Xeon system CPUs share only two common buses for both processor-processor and processor-memory communication. As the number of CPUs increases in a typical Xeon system, contention
Bus contention
Bus contention, in computer design, is an undesirable state of the bus in which more than one device on the bus attempts to place values on the bus at the same time. Most bus architectures require their devices follow an arbitration protocol carefully designed to make the likelihood of contention...

 for the shared bus causes computing efficiency to drop. Intel is migrating to a memory architecture similar to the Opteron's for the Intel Core i7 family of processors and their Xeon derivatives.

Multi-core Opterons

In April 2005, AMD introduced its first multi-core Opterons. At the time, AMD's use of the term multi-core in practice meant dual-core; each physical Opteron chip contained two processor cores. This effectively doubled the computing performance available to each motherboard processor socket. One socket can now deliver the performance of two processors, two sockets can deliver the performance of four processors, and so on. Because motherboard costs increase dramatically as the number of CPU sockets increase, multicore CPUs enable a multiprocessing system to be built at lower cost.

AMD's model number scheme has changed somewhat in light of its new multicore lineup. At the time of its introduction, AMD's fastest multicore Opteron was the model 875, with two cores running at 2.2 GHz
GHZ
GHZ or GHz may refer to:# Gigahertz .# Greenberger-Horne-Zeilinger state — a quantum entanglement of three particles.# Galactic Habitable Zone — the region of a galaxy that is favorable to the formation of life....

 each. AMD's fastest single-core Opteron at this time was the model 252, with one core running at 2.6 GHz. For multithreaded applications, or many single threaded applications, the model 875 would be much faster than the model 252.

Second-generation Opterons are offered in three series: the 1000 Series (single socket only), the 2000 Series (dual socket-capable), and the 8000 Series (quad or octo socket-capable). The 1000 Series uses the AM2 socket
Socket AM2
The Socket AM2, renamed from Socket M2 , is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments...

. The 2000 Series and 8000 Series use Socket F
Socket F
Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers.-Technical specifications:...

.http://www.amd.com/us-en/Processors/ProductInformation/0,,30_118_8796_14309,00.html

AMD launched its Third-Generation Quad-core Opteron chips on September 10, 2007 with hardware vendors to follow suit with servers in the following month. Based on a core design codenamed Barcelona, new power and thermal management techniques are planned for the chips. Existing dual core DDR2 based platforms will be upgradeable to quad core chips.
The fourth generation was launched in June 2009 with the Istanbul hexa-cores.

AMD released its latest generation of Opteron CPUs in March 2010 with the Magny-Cours Opteron 6100 series CPUs for Socket G34
Socket G34
Socket G34 is a CPU socket designed by AMD to support AMD's multi-chip module Opteron 6000-series server processors. G34 was launched on March 29, 2010, alongside the initial grouping of Opteron 6100 processors designed for it. Socket G34 supports four DDR3 SDRAM channels, two for each die in the...

. These are 8- and 12-core multi-chip module
Multi-Chip Module
A multi-chip module is a specialized electronic package where multiple integrated circuits , semiconductor dies or other discrete components are packaged onto a unifying substrate, facilitating their use as a single component...

 CPUs consisting of two four or six-core dies with a high-speed, on-package HyperTransport
HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

 3.1 link connecting the two dies. These CPUs update the multi-socket Opteron platform to use DDR3 memory and increased the maximum HyperTransport link speed from 2.40 GHz (4.80 GT/sec) for the Istanbul CPUs to 3.20 GHz (6.40 GT/sec.)

AMD has also changed the naming scheme for its current and upcoming Opteron models. Opteron 4000 series CPUs on Socket C32 (released July 2010) are dual-socket capable and are targeted at uniprocessor and dual-processor uses. The Opteron 6000 series CPUs on Socket G34 are quad-socket capable and are targeted at high-end dual-processor and quad-processor applications.

Socket 939

AMD has also released Socket 939
Socket 939
Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors.-Availability:...

 Opterons, reducing the cost of motherboards for low-end servers and workstations. Except for the fact they have 1 MB
Megabyte
The megabyte is a multiple of the unit byte for digital information storage or transmission with two different values depending on context: bytes generally for computer memory; and one million bytes generally for computer storage. The IEEE Standards Board has decided that "Mega will mean 1 000...

 L2 Cache (versus 512 KB
Kilobyte
The kilobyte is a multiple of the unit byte for digital information. Although the prefix kilo- means 1000, the term kilobyte and symbol KB have historically been used to refer to either 1024 bytes or 1000 bytes, dependent upon context, in the fields of computer science and information...

 for the Athlon64) the Socket 939 Opterons are identical to the San Diego and Toledo core Athlon 64
Athlon 64
The Athlon 64 is an eighth-generation, AMD64-architecture microprocessor produced by AMD, released on September 23, 2003. It is the third processor to bear the name Athlon, and the immediate successor to the Athlon XP...

s, but are run at lower clockspeeds than the cores are capable of, making them more stable. They are also the only dual core Socket 939 processors still easily available now that the Athlon 64 X2s for that platform have been discontinued, though even these processors are becoming more and more difficult to find. http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_609,00.html

Socket AM2

Socket AM2 Opterons are available for servers that only have a single-chip setup. Codenamed Santa Ana, rev. F dual core AM2 Opterons feature 2×1 MB
MB
- Computers :* Megabyte , a measure of amount of information used, for example, to quantify computer memory or storage capacity* Megabit , a measure of amount of information* MacBook* Motherboard* Message board- File format ".MB" :...

 L2 cache, unlike the majority of their Athlon 64 X2
Athlon 64 X2
The Athlon 64 X2 is the first dual-core desktop CPU designed by AMD. It was designed from scratch as native dual-core by using an already multi-CPU enabled Athlon 64, joining it with another functional core on one die, and connecting both via a shared dual-channel memory controller/north bridge and...

 cousins which feature 2x512 KB
Kilobyte
The kilobyte is a multiple of the unit byte for digital information. Although the prefix kilo- means 1000, the term kilobyte and symbol KB have historically been used to refer to either 1024 bytes or 1000 bytes, dependent upon context, in the fields of computer science and information...

 L2 cache. These CPUs are given model numbers ranging from 1210 to 1224.

Socket AM2+

AMD introduced three quad-core Opterons on Socket AM2+ for single-CPU servers in 2007. These CPUs are produced on a 65 nm manufacturing process and are similar to the Agena Phenom X4 CPUs. The Socket AM2+ quad-core Opterons are code-named "Budapest." The Socket AM2+ Opterons carry model numbers of 1352 (2.10 GHz), 1354 (2.20 GHz), and 1356 (2.30 GHz.)

Socket AM3

AMD introduced three quad-core Opterons on Socket AM3 for single-CPU servers in 2009. These CPUs are produced on a 45 nm manufacturing process and are similar to the Deneb-based Phenom II X4 CPUs. The Socket AM3 quad-core Opterons are code-named "Suzuka." These CPUs carry model numbers of 1381 (2.50 GHz), 1385 (2.70 GHz), and 1389 (2.90 GHz.)

Socket F

Socket F
Socket F
Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers.-Technical specifications:...

 (LGA
Land grid array
The land grid array is a type of surface-mount packaging for integrated circuits that is notable for having the pins on the socket rather than the integrated circuit...

 1207 contacts) is AMD’s second generation of Opteron socket. This socket supports processors such as the Santa Rosa, Barcelona, Shanghai, and Istanbul codenamed processors. The “Lidded land grid array
Land grid array
The land grid array is a type of surface-mount packaging for integrated circuits that is notable for having the pins on the socket rather than the integrated circuit...

” socket adds support for DDR2 SDRAM
DDR2 SDRAM
DDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. It supersedes the original DDR SDRAM specification and has itself been superseded by DDR3 SDRAM...

 and improved HyperTransport
HyperTransport
HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

 version 3 connectivity. Physically the socket and processor package are nearly identical, although not generally compatible with socket 1207 FX

Socket G34

Socket G34
Socket G34
Socket G34 is a CPU socket designed by AMD to support AMD's multi-chip module Opteron 6000-series server processors. G34 was launched on March 29, 2010, alongside the initial grouping of Opteron 6100 processors designed for it. Socket G34 supports four DDR3 SDRAM channels, two for each die in the...

 (LGA
Land grid array
The land grid array is a type of surface-mount packaging for integrated circuits that is notable for having the pins on the socket rather than the integrated circuit...

 1944 contacts) is one of the third generation of Opteron sockets, along with Socket C32
Socket C32
The AMD Socket C32 is the server processor socket for AMD's current single-CPU and dual-CPU Opteron 4000 series CPUs. It is the successor to Socket AM3 for single-CPU servers and the successor for Socket F for lower-end dual-CPU servers...

. This socket supports Magny-Cours Opteron 6100 series processors at the present and will support future CPUs, including the upcoming, Bulldozer-based Interlagos Opteron 6200 series processors. This socket supports four channels of DDR3 SDRAM
DDR3 SDRAM
In computing, DDR3 SDRAM, an abbreviation for double data rate type three synchronous dynamic random access memory, is a modern kind of dynamic random access memory with a high bandwidth interface. It is one of several variants of DRAM and associated interface techniques used since the early 1970s...

 (two per CPU die). Unlike previous multi-CPU Opteron sockets, Socket G34 CPUs will function with unbuffered ECC or non-ECC RAM in addition to the traditional registered ECC RAM.

Socket C32

Socket C32
Socket C32
The AMD Socket C32 is the server processor socket for AMD's current single-CPU and dual-CPU Opteron 4000 series CPUs. It is the successor to Socket AM3 for single-CPU servers and the successor for Socket F for lower-end dual-CPU servers...

 (LGA
Land grid array
The land grid array is a type of surface-mount packaging for integrated circuits that is notable for having the pins on the socket rather than the integrated circuit...

 1207 contacts) is the other member of the third generation of Opteron sockets. This socket is physically similar to Socket F
Socket F
Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers.-Technical specifications:...

 but is not compatible with Socket F CPUs. Socket C32 uses DDR3 SDRAM and is keyed differently to prevent the insertion of Socket F CPUs that can use only DDR2 SDRAM. Like Socket G34, Socket C32 CPUs will be able to use unbuffered ECC or non-ECC RAM in addition to registered ECC SDRAM.

Micro-architecture update

The Opteron line saw an update with the implementation of the AMD K10
AMD K10
The AMD Family 10h is a microprocessor microarchitecture by AMD. Though there were once reports that the K10 had been canceled, the first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November...

 microarchitecture. New processors, launched in the third quarter of 2007 (codename Barcelona), incorporate a variety of improvements, particularly in memory prefetching, speculative loads, SIMD
SIMD
Single instruction, multiple data , is a class of parallel computers in Flynn's taxonomy. It describes computers with multiple processing elements that perform the same operation on multiple data simultaneously...

 execution and branch prediction, yielding an appreciable performance improvement over K8-based Opterons, within the same power envelope.

In the meantime, AMD has also utilized a new scheme to characterize the power consumption of new processors under "average" daily usage, named Average CPU Power
Average CPU Power
The average CPU power , is a scheme to characterize power consumption of new central processing units under "average" daily usage, especially server processors, the rating scheme is defined by Advanced Micro Devices for use in its line of processors based on the K10 microarchitecture...

 (ACP).

Models

For Socket 940 and Socket 939 Opterons, each chip has a three-digit model number, in the form Opteron XYY. For Socket F and Socket AM2 Opterons, each chip has a four-digit model number, in the form Opteron XZYY. For all first, second, and third-generation Opterons, the first digit (the X) specifies the number of CPUs on the target machine:
  • 1 - Designed for uniprocessor systems
  • 2 - Designed for dual-processor systems
  • 8 - Designed for systems with 4 or 8 processors

For Socket F and Socket AM2 Opterons, the second digit (the Z) represents the processor generation. Presently, only 2 (dual-core, DDR2), 3 (quad-core, DDR2) and 4 (six-core, DDR2) are used.

Socket C32 and G34 Opterons use a new four-digit numbering scheme. The first digit refers to the number of CPUs in the target machine:
  • 4 - Designed for uniprocessor and dual-processor systems.
  • 6 - Designed for dual-processor and four-processor systems.


Like the previous second and third generation Opterons, the second number refers to the processor generation. "1" refers to AMD K10
AMD K10
The AMD Family 10h is a microprocessor microarchitecture by AMD. Though there were once reports that the K10 had been canceled, the first third-generation Opteron products for servers were launched on September 10, 2007, with the Phenom processors for desktops following and launching on November...

-based units (Magny-Cours and Lisbon) and "2" will refer to the upcoming Bulldozer-based Interlagos and Valencia-based units.

For all Opterons, the last two digits in the model number (the YY) indicate the clock frequency of a CPU, a higher number indicating a higher clock frequency. This speed indication is comparable to processors of the same generation if they have the same amount of cores, single-cores and dual-cores have different indications despite sometimes having the same clock frequency.

The suffix HE or EE indicates a high-efficiency/energy-efficiency model having a lower TDP
Thermal Design Power
The thermal design power , sometimes called thermal design point, refers to the maximum amount of power the cooling system in a computer is required to dissipate. For example, a laptop's CPU cooling system may be designed for a 20 watt TDP, which means that it can dissipate up to 20 watts of heat...

 than a standard Opteron. The suffix SE indicates a top-of-the-line model having a higher TDP than a standard Opteron.

Starting from 65 nm fabrication process, the opteron codenames will be based on Formula 1 hosting cities. AMD have a long term sponsorship with F1's most successful team Ferrari
Scuderia Ferrari
Scuderia Ferrari is the racing team division of the Ferrari automobile marque. The team currently only races in Formula One but has competed in numerous classes of motorsport since its formation in 1929, including sportscar racing....


AMD Opteron processor family
Logo Server
Server (computing)
In the context of client-server architecture, a server is a computer program running to serve the requests of other programs, the "clients". Thus, the "server" performs some computational task on behalf of "clients"...

Code-named Core Date released Remarks
SledgeHammer
Venus
Troy
Athens
130 nm
90 nm
90 nm
90 nm
Jun 2003
Aug 2005
Jan 2006
Jan 2006
Solo-core
Denmark
Italy
Egypt
Santa Ana
Santa Rosa
90 nm
90 nm
90 nm
90 nm
90 nm
Mar 2006
May 2006
Jun 2006
Aug 2006
Aug 2006
Dual-core
Barcelona
Budapest
Shanghai
65 nm
65 nm
45 nm
Sep 2007
Apr 2008
Nov 2008
Quad-core
Istanbul 45 nm Jun 2009 Six-core
Magny-Cours 45 nm Mar 2010 Eight-core
Magny-Cours 45 nm Mar 2010 Twelve-core
List of AMD Opteron microprocessors

Opteron (130 nm SOI)

Single-core – SledgeHammer (1yy, 2yy, 8yy)
  • CPU-Steppings: B3, C0, CG
  • L1-Cache: 64 + 64 KB (Data + Instructions)
  • L2-Cache: 1024 KB, fullspeed
  • MMX, Extended 3DNow!
    3DNow!
    3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices . It adds single instruction multiple data instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...

    , SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , AMD64
    X86-64
    x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...

  • Socket 940
    Socket 940
    Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

    , 800 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

  • Registered DDR SDRAM
    DDR SDRAM
    Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...

     required, ECC possible
  • VCore: 1.50 V - 1.55 V
  • Max Power (TDP): 89 W
  • First Release: April 22, 2003 http://www.amd.com/us-en/Corporate/VirtualPressRoom/0,,51_104_543_13302~69678,00.html
  • Clockrate: 1.4–2.4 GHz (x40 - x50)

Opteron (90 nm SOI, DDR)

Single-core – Venus (1yy), Troy (2yy), Athens (8yy)
  • CPU-Steppings: E4
  • L1-Cache: 64 + 64 KB (Data + Instructions)
  • L2-Cache: 1024 KB, fullspeed
  • MMX, Extended 3DNow!
    3DNow!
    3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices . It adds single instruction multiple data instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...

    , SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , AMD64
    X86-64
    x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...

  • Socket 940
    Socket 940
    Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

    , 800 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

  • Socket 939
    Socket 939
    Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors.-Availability:...

    /Socket 940
    Socket 940
    Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

    , 1000 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

  • Registered DDR SDRAM
    DDR SDRAM
    Double data rate synchronous dynamic random access memory is a class of memory integrated circuits used in computers. DDR SDRAM has been superseded by DDR2 SDRAM and DDR3 SDRAM, neither of which are either forward or backward compatible with DDR SDRAM, meaning that DDR2 or DDR3 memory modules...

     required for socket 940, ECC possible
  • VCore: 1.35 V - 1.4 V
  • Max power (TDP): 95 W
  • NX Bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

  • 64-bit segment limit checks for VMware-style binary-translation virtualization.
  • Optimized Power Management (OPM)
  • First Release: February 14, 2005
  • Clockrate: 1.6 - 3.0 GHz (x42 - x56)


Dual-core – Denmark (1yy), Italy (2yy), Egypt (8yy)
  • CPU-Steppings: E1, E6
  • First Release: Spring 2005
  • Clockrate: 1.6–2.8 GHz (x60, x65, x70, x75, x80, x85, x90)
  • ...
  • Socket 939
    Socket 939
    Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors.-Availability:...

    /Socket 940
    Socket 940
    Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

    , 1000 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

  • ...
  • NX bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...


Opteron (90 nm SOI, DDR2)

Dual-core – Santa Ana (12yy), Santa Rosa (22yy, 82yy)
  • CPU-Steppings: F2, F3
  • L1-Cache: 64 + 64 KB (Data + Instructions)
  • L2-Cache: 2*1024 KB, fullspeed
  • MMX, Extended 3DNow!
    3DNow!
    3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices . It adds single instruction multiple data instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...

    , SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , AMD64
    X86-64
    x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...

  • Socket F
    Socket F
    Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers.-Technical specifications:...

    , 1000 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

     - Opteron 2yy, 8yy
  • Socket AM2
    Socket AM2
    The Socket AM2, renamed from Socket M2 , is a CPU socket designed by AMD for desktop processors, including the performance, mainstream and value segments...

    , 1000 MHz HyperTransport
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

     - Opteron 1yy
  • VCore: 1.35 V
  • Max Power (TDP): 95 W
  • NX Bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

  • AMD-V Virtualization
  • Optimized Power Management (OPM)
  • First Release: ?????? 2006
  • Clockrate: 1.8–3.2 GHz (xx10, xx12, xx14, xx16, xx18, xx20, xx22, xx24)

Opteron (65 nm SOI)

Quad-core – Barcelona (23xx, 83xx) 2360/8360 and below, Budapest (13yy) 1356 and below
  • CPU-Steppings: BA, B3
  • L1-Cache: 64 + 64 KB (Data + Instructions) per core
  • L2-Cache: 512 KB, fullspeed per core
  • L3-Cache: 2048 KB, shared
  • MMX, Extended 3DNow!
    3DNow!
    3DNow! is an extension to the x86 instruction set developed by Advanced Micro Devices . It adds single instruction multiple data instructions to the base x86 instruction set, enabling it to perform simple vector processing, which improves the performance of many graphic-intensive applications...

    , SSE
    Streaming SIMD Extensions
    In computing, Streaming SIMD Extensions is a SIMD instruction set extension to the x86 architecture, designed by Intel and introduced in 1999 in their Pentium III series processors as a reply to AMD's 3DNow! . SSE contains 70 new instructions, most of which work on single precision floating point...

    , SSE2
    SSE2
    SSE2, Streaming SIMD Extensions 2, is one of the Intel SIMD processor supplementary instruction sets first introduced by Intel with the initial version of the Pentium 4 in 2001. It extends the earlier SSE instruction set, and is intended to fully supplant MMX. Intel extended SSE2 to create SSE3...

    , SSE3
    SSE3
    SSE3, Streaming SIMD Extensions 3, also known by its Intel code name Prescott New Instructions , is the third iteration of the SSE instruction set for the IA-32 architecture. Intel introduced SSE3 in early 2004 with the Prescott revision of their Pentium 4 CPU...

    , AMD64
    X86-64
    x86-64 is an extension of the x86 instruction set. It supports vastly larger virtual and physical address spaces than are possible on x86, thereby allowing programmers to conveniently work with much larger data sets. x86-64 also provides 64-bit general purpose registers and numerous other...

    , SSE4a
  • Socket F
    Socket F
    Socket F is a CPU socket designed by AMD for its Opteron line of CPUs released on August 15, 2006. In 2010 Socket F was replaced by Socket C32 for entry-level servers and Socket G34 for high-end servers.-Technical specifications:...

    , Socket AM2+
    Socket AM2+
    Socket AM2+ is a CPU socket, which is the immediate successor to Socket AM2 that is used by several AMD processors such as Athlon 64 X2. Socket AM2+ is a mid-migration from Socket AM2 to Socket AM3 and both AM2+ and AM2 socket CPUs and motherboards have the potential to operate together...

    , HyperTransport 3.0
    HyperTransport
    HyperTransport , formerly known as Lightning Data Transport , is a technology for interconnection of computer processors. It is a bidirectional serial/parallel high-bandwidth, low-latency point-to-point link that was introduced on April 2, 2001...

     (1.6 GHz-2 GHz)
  • Registered DDR2 SDRAM
    DDR2 SDRAM
    DDR2 SDRAM is a double data rate synchronous dynamic random-access memory interface. It supersedes the original DDR SDRAM specification and has itself been superseded by DDR3 SDRAM...

     required, ECC possible
  • VCore: 1.2 V
    Volt
    The volt is the SI derived unit for electric potential, electric potential difference, and electromotive force. The volt is named in honor of the Italian physicist Alessandro Volta , who invented the voltaic pile, possibly the first chemical battery.- Definition :A single volt is defined as the...

  • Max Power (TDP): ?
  • NX Bit
    NX bit
    The NX bit, which stands for No eXecute, is a technology used in CPUs to segregate areas of memory for use by either storage of processor instructions or for storage of data, a feature normally only found in Harvard architecture processors...

  • 2nd generation AMD-V Virtualization with Rapid Virtualization Indexing
    Rapid Virtualization Indexing
    Rapid Virtualization Indexing is an AMD second generation hardware-assisted virtualization technology for the processor memory management unit ....

     (RVI)
  • Split power plane dynamic power management
  • First Release: September 10, 2007
  • Clockrate: 1.7–2.5 GHz
    Hertz
    The hertz is the SI unit of frequency defined as the number of cycles per second of a periodic phenomenon. One of its most common uses is the description of the sine wave, particularly those used in radio and audio applications....


Opteron (45 nm SOI)

Quad-core – Shanghai (23xx, 83xx) 2370/8370 and above, Suzuka (13yy) 1381 and above


Hexa-core – Istanbul (24xx, 84xx)

Released June 1, 2009.
  • CPU-Steppings: D0
  • L3-Cache: 6 MB, shared
  • Clockrate: 2.2–2.8 GHz
    Hertz
    The hertz is the SI unit of frequency defined as the number of cycles per second of a periodic phenomenon. One of its most common uses is the description of the sine wave, particularly those used in radio and audio applications....

  • HyperTransport 3.0
  • HT–Assist
  • support for DDR2 800 MHz memory http://www.amd.com/us-en/assets/content_type/DownloadableAssets/43410D_FastFacts_WEB.pdf


Octa-core – Magny-Cours MCM (6124-6140)

Released March 29, 2010.
  • CPU-Steppings: D1
  • L3-Cache: 2x6 MB, shared
  • Clockrate: 2.0–2.6 GHz
    Hertz
    The hertz is the SI unit of frequency defined as the number of cycles per second of a periodic phenomenon. One of its most common uses is the description of the sine wave, particularly those used in radio and audio applications....

  • Four HyperTransport 3.1 at 3.2 GHz (6.40 GT/sec)
  • HT–Assist
  • support for DDR3 1333 MHz memory
  • Socket G34
    Socket G34
    Socket G34 is a CPU socket designed by AMD to support AMD's multi-chip module Opteron 6000-series server processors. G34 was launched on March 29, 2010, alongside the initial grouping of Opteron 6100 processors designed for it. Socket G34 supports four DDR3 SDRAM channels, two for each die in the...



Dodeca-core – Magny-Cours MCM (6164-6180SE)

Released March 29, 2010
  • CPU-Steppings: D1
  • L3-Cache: 2x6 MB, shared
  • Clockrate: 1.7–2.5 GHz
    Hertz
    The hertz is the SI unit of frequency defined as the number of cycles per second of a periodic phenomenon. One of its most common uses is the description of the sine wave, particularly those used in radio and audio applications....

  • Four HyperTransport 3.1 links at 3.2 GHz (6.40 GT/sec)
  • HT–Assist
  • support for DDR3 1333 MHz memory
  • Socket G34
    Socket G34
    Socket G34 is a CPU socket designed by AMD to support AMD's multi-chip module Opteron 6000-series server processors. G34 was launched on March 29, 2010, alongside the initial grouping of Opteron 6100 processors designed for it. Socket G34 supports four DDR3 SDRAM channels, two for each die in the...



Quad-core – Lisbon (4122, 4130)

Released June 23, 2010
  • CPU-Steppings: D0
  • L3-Cache: 6 MB
  • Clockrate: 2.2 GHz (4122), 2.6 GHz (4130)
  • Two HyperTransport links at 3.2 GHz (6.40 GT/sec)
  • HT-Assist
  • Support for DDR3-1333 memory
  • Socket C32
    Socket C32
    The AMD Socket C32 is the server processor socket for AMD's current single-CPU and dual-CPU Opteron 4000 series CPUs. It is the successor to Socket AM3 for single-CPU servers and the successor for Socket F for lower-end dual-CPU servers...



Hex-core – Lisbon (4162-4184)

Released June 23, 2010
  • CPU-Steppings: D1
  • L3-Cache: 6 MB
  • Clockrate: 1.7-2.8 GHz
  • Two HyperTransport links at 3.2 GHz (6.40 GT/sec)
  • HT-Assist
  • Support for DDR3-1333 memory
  • Socket C32
    Socket C32
    The AMD Socket C32 is the server processor socket for AMD's current single-CPU and dual-CPU Opteron 4000 series CPUs. It is the successor to Socket AM3 for single-CPU servers and the successor for Socket F for lower-end dual-CPU servers...


Supercomputers

Supercomputers based on Opteron mentioned in the top 20 fastest supercomputers in the world as of June 20, 2011:
  • #3: Oak Ridge National Laboratory
    Oak Ridge National Laboratory
    Oak Ridge National Laboratory is a multiprogram science and technology national laboratory managed for the United States Department of Energy by UT-Battelle. ORNL is the DOE's largest science and energy laboratory. ORNL is located in Oak Ridge, Tennessee, near Knoxville...

    , USA. Jaguar - Cray XT5-HE. AMD64 Opteron Six Core 2600 MHz (10.4 GFlops/unit). Cray Inc. 224,162 total cores. Rpeak: 2331.00 TFlops.
  • #6: Cielo - Cray XE6 8-core 2.4 GHz. Cray Inc. 142,272 total cores. Rpeak: 1365.81 TFlops
  • #8: Hopper - Cray XE6 12-core 2.1 GHz. Cray Inc. 153,408 total cores. Rpeak 1288.63 TFlops
  • #10: The IBM Roadrunner at Los Alamos National Laboratory
    Los Alamos National Laboratory
    Los Alamos National Laboratory is a United States Department of Energy national laboratory, managed and operated by Los Alamos National Security , located in Los Alamos, New Mexico...

     uses 6,912 Opteron Dual Core processors. 432 are used to help the operators run the system, while the other 6,480 interconnected processors are each attached to two of 12,960 IBM PowerXCell 8i
    Cell (microprocessor)
    Cell is a microprocessor architecture jointly developed by Sony, Sony Computer Entertainment, Toshiba, and IBM, an alliance known as "STI". The architectural design and first implementation were carried out at the STI Design Center in Austin, Texas over a four-year period beginning March 2001 on a...

     processors. As a supercomputer, the Roadrunner is considered an Opteron cluster with Cell accelerators, as each node consists of a Cell attached to an Opteron core and the Opterons to each other. Rpeak: 1375.78 TFlop.
  • #19: Raptor - Cray XE6 8-core 2.4 GHz Cray Inc. 42,712 total cores. Rpeak 410.04 Tflops
  • #11: National Institute for Computational Sciences
    National Institute for Computational Sciences
    The National Institute for Computational Sciences is funded by the National Science Foundation and managed by the University of Tennessee. NICS is home to Kraken, the most powerful computer in the world managed by academia and the world's fourth overall most powerful supercomputer...

    , University of Tennessee
    University of Tennessee
    The University of Tennessee is a public land-grant university headquartered at Knoxville, Tennessee, United States...

    , USA. Kraken XT5. AMD64 Opteron Six Core 2600 MHz (10.4 GFlops/unit). Cray Inc. RPeak:1028.85 TFlops.
  • #17: Texas Advanced Computing Center
    Texas Advanced Computing Center
    The Texas Advanced Computing Center at the University of Texas at Austin, United States, is a research center for advanced computational science, engineering and technology. TACC is located on UT's J.J. Pickle Research Campus....

    , University of Texas, USA. Ranger - AMD64 Opteron Quad Core 2300 MHz (9.2 GFlops/unit). Sun Microsystems. 62,976 total cores. Rpeak: 579.38 TFlops.
  • #27: Lawrence Berkeley National Laboratory
    Lawrence Berkeley National Laboratory
    The Lawrence Berkeley National Laboratory , is a U.S. Department of Energy national laboratory conducting unclassified scientific research. It is located on the grounds of the University of California, Berkeley, in the Berkeley Hills above the central campus...

     / National Energy Research Scientific Computing Center
    National Energy Research Scientific Computing Center
    The ', or NERSC for short, is a designated user facility operated by Lawrence Berkeley National Laboratory and the Department of Energy. It contains several cluster supercomputers, the largest of which is...

    , USA, Franklin - Cray XT4 Quad Core 2300 MHz (9.2 GFlops/unit). Cray Inc. 38,642 total cores. Rpeak: 355.51 TFlops.
  • #35: Oak Ridge National Laboratory
    Oak Ridge National Laboratory
    Oak Ridge National Laboratory is a multiprogram science and technology national laboratory managed for the United States Department of Energy by UT-Battelle. ORNL is the DOE's largest science and energy laboratory. ORNL is located in Oak Ridge, Tennessee, near Knoxville...

    , USA. Jaguar - Cray XT4 Quad Core 2.1 GHz. Cray Inc. 30,976 total cores. Rpeak: 260.20 TFlops.
  • #36 Sandia National Laboratory, USA. Red Storm - Cray XT3/XT4. Cray Inc. 38,208 total cores. Rpeak: 284.00 TFlops.
  • #40 Shanghai Supercomputer Center
    Shanghai Supercomputer Center
    Shanghai Supercomputer Center , founded on December 2000, was invested by Shanghai Municipal Government. With its world-class facilities and quality services, Shanghai Supercomputer Center offers high performance computing, technical support and technical consulting services to wide range of...

    , China. Magic Cube - Dawning 5000A, Quad Core Opteron 1.9 GHz, Infiniband, Windows HPC. 30,720 total cores. Rpeak: 233.47 TFlops.
  • #94 University of Edinburgh
    University of Edinburgh
    The University of Edinburgh, founded in 1583, is a public research university located in Edinburgh, the capital of Scotland, and a UNESCO World Heritage Site. The university is deeply embedded in the fabric of the city, with many of the buildings in the historic Old Town belonging to the university...

    , United Kingdom. HECToR - Cray XT4. AMD64 Opteron 2.3 GHz. Cray Inc. 22,656 total cores. Rpeak: 113.05 TFlops.

Opteron without Optimized Power Management

AMD has released some Opteron processors without Optimized Power Management (OPM) support, which use DDR memory. The following table describes those processors lacking OPM.
Max P-State
Frequency
Min P-State
Frequency
Model Package-Socket Core # TDP (W) Manufacturing
Process
Part Number(OPN)
1400 MHz N/A 140 Socket 940
Socket 940
Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

 
1 82.1 130 nm  OSA140CEP5AT
1400 MHz N/A 240 Socket 940 1 82.1 130 nm OSA240CEP5AU
1400 MHz N/A 840 Socket 940 1 82.1 130 nm OSA840CEP5AV
1600 MHz N/A 142 Socket 940 1 82.1 130 nm OSA142CEP5AT
1600 MHz N/A 242 Socket 940 1 82.1 130 nm OSA242CEP5AU
1600 MHz N/A 842 Socket 940 1 82.1 130 nm OSA842CEP5AV
1600 MHz N/A 242 Socket 940 1 85.3 90 nm  OSA242FAA5BL
1600 MHz N/A 842 Socket 940 1 85.3 90 nm OSA842FAA5BM
1600 MHz N/A 260 Socket 940 2 55.0 90 nm OSK260FAA6CB
1600 MHz N/A 860 Socket 940 2 55.0 90 nm OSK860FAA6CC

Opteron recall

AMD has recalled some E4 stepping-revision single-core Opteron processors, including x52 (2.6 GHz) and x54 (2.8 GHz) models which use DDR memory. The following table describes affected processors, as they are listed in AMD Opteron x52 and x54 Production Notice.
Max P-State
Frequency
Uni-Processor Dual Processor Multi-Processor Package-Socket
2600 MHz 152 252 852 Socket 940
Socket 940
Socket 940 is a 940-pin socket for 64-bit AMD server processors. This socket is entirely square in shape and pins are arranged in a grid with the exception of four key pins used to align the processor and the corners...

2800 MHz N/A 254 854 Socket 940
2600 MHz 152 N/A N/A Socket 939
Socket 939
Socket 939 is a CPU socket released by AMD in June 2004 to supersede the previous Socket 754 for Athlon 64 processors. Socket 939 was succeeded by Socket AM2 in May 2006. It is the second socket designed for AMD's AMD64 range of processors.-Availability:...

2800 MHz 154 N/A N/A Socket 939


The affected processors may produce inconsistent results in the presence of three specific conditions occurring simultaneously:
  • The execution of floating point-intensive code sequences
  • Elevated processor temperatures
  • Elevated ambient temperatures


A software verification tool for identifying the AMD Opteron processors listed in the above table that may be affected under these specific conditions is available only to AMD OEM
Original Equipment Manufacturer
An original equipment manufacturer, or OEM, manufactures products or components that are purchased by a company and retailed under that purchasing company's brand name. OEM refers to the company that originally manufactured the product. When referring to automotive parts, OEM designates a...

 partners. AMD will replace those processors at no charge.

Recognition

In the February 2010 issue of Custom PC (a UK based computing magazine focused on PC hardware), the AMD Opteron 144 (released in Summer 2005) appeared in the "Hardware Hall of Fame". It was described as "The best overclocker's CPU ever made" due to its low cost and ability to run at speeds way beyond its stock speed (according to Custom PC, it could run at "close to 3 GHz on air").

Future

In Q2 2010, the remaining lineup of Socket F CPUs and the Socket AM3 Opterons will be replaced with processors codenamed Lisbon on Socket C32
Socket C32
The AMD Socket C32 is the server processor socket for AMD's current single-CPU and dual-CPU Opteron 4000 series CPUs. It is the successor to Socket AM3 for single-CPU servers and the successor for Socket F for lower-end dual-CPU servers...

 for uniprocessor and dual-processor configurations. Lisbon processors will be available in quad-core and six-core configurations. Later, the server line of processors will incorporate the newly announced Bulldozer
Bulldozer (processor)
Bulldozer is the codename Advanced Micro Devices has given to one of the next-generation CPU cores after the K10 microarchitecture for the company's M-SPACE design methodology, with the core specifically aimed at 10-watt to 125-watt TDP computing products. Bulldozer is a completely new design...

core with three or four modules (6 or 8 threads) on the 32 nm process, each supporting FMA
FMA instruction set
The FMA instruction set is the name of a future extension to the 128-bit SIMD instructions in the X86 microprocessor instruction set to perform fused multiply–add operations...

 aimed at better HPC and cryptographic computations. Bulldozer-based products are expected to be released in 2011.

External links

The source of this article is wikipedia, the free encyclopedia.  The text of this article is licensed under the GFDL.
 
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