Parallax Propeller
Encyclopedia
The Parallax
P8X32A Propeller chip, introduced in 2006, is a multi-core architecture
parallel
microcontroller
with eight 32-bit
RISC
CPU
cores.
The Parallax Propeller microcontroller, Propeller Assembly language
, and Spin interpreter
were designed by one person, Parallax's co-founder and president Chip Gracey. The Spin Programming language
and "Propeller Tool" integrated development environment
were designed by Chip Gracey and Parallax's software engineer Jeff Martin. The Propeller is known for being easy to program.
which has access to 512 32-bit long words (2 KB
) of instructions and data. Self-modifying code
is possible and is used internally, for example by an instruction that is used to create a subroutine call/return mechanism without the need for a stack. Access to shared memory (32 KB RAM; 32 KB ROM
) is controlled in round-robin
fashion by an internal bus
controller called the hub. Each cog also has access to two dedicated hardware counters and two special "video registers" for use in generating PAL
, NTSC
, VGA
, servo
-control, or other timing signals.
stability) or an external crystal
or resonator
(providing higher maximum speed with greater accuracy at an increased total cost). Only the external oscillator may be run through an on-chip PLL
clock multiplier, which may be set at 1x, 2x, 4x, 8x, or 16x.
Both the on-board oscillator frequency (if used) and the PLL multiplier value may be changed at run-time. If used correctly, this can improve power efficiency; for example, the PLL multiplier can be decreased before a long "no operation" wait required for timing purposes, then increased afterwards, causing the processor to use less power. However, the utility of this technique is limited to situations where no other cog is executing timing-dependent code (or is carefully designed to cope with the change), since the effective clock rate is common to all cogs.
The effective clock rate ranges from 32 kHz up to 80 MHz (with the exact values available for dynamic control dependent on the configuration used, as described above). When running at 80 MHz, the proprietary interpreted Spin programming language executes approximately 80,000 instruction-tokens per second on each core, giving 8 times 80,000 for 640,000 high level instructions per second. Most machine-language instructions take 4 clock-cycles to execute, resulting in 20 MIPS
per cog, or 160 MIPS in total for an 8-cog Propeller.
In addition to lowering the clock rate to that actually required, power consumption can be reduced by turning off cogs (which then use very little power), and by reconfiguring I/O pins which are not needed, or can be safely placed in a high-impedance state ("tristated
"), as inputs. Pins can be reconfigured dynamically, but again, the change applies to all cogs, so synchronization is important for certain designs. (Some protection is available for situations where one core attempts to use a pin as an output while another attempts to use it as an input; this is explained in Parallax's technical reference manual.)
or NTSC
displays (including modulation
for broadcast) and VGA monitors. Parallax thus makes sample code available which can generate video signals (text and somewhat low-resolution graphics) using a minimum parts count consisting of the Propeller, a crystal oscillator, and a few resistors to form a crude DAC
. The frequency of the oscillator is important, as the correction ability of the video timing hardware is limited to the clock rate. It is possible to use multiple cogs in parallel to generate a single video signal. More generally, the timing hardware can be used to implement various pulse-width modulated
(PWM) timing signals.
The math extensions are intended to help compensate for the lack of a floating-point unit as well as more primitive missing operations, such as multiplication and division (this is masked in Spin but is a limitation for assembly language
routines). The Propeller is a 32-bit processor, however, and these tables may not have sufficient accuracy for higher-precision applications.
high level
computer programming language created by Parallax
's Chip Gracey, who also designed the Propeller microcontroller
on which it runs, for their line of Propeller microcontrollers.
Spin code is written on the Propeller Tool, a GUI oriented software development platform written for Windows XP. This compiler converts the Spin code into bytecode
s that can be loaded (with the same tool) into the main 32 KB RAM, and optionally into the serial boot FLASH EEPROM, of the Propeller chip. After booting the propeller a bytecode interpreter is copied from the built in ROM into the 2 KB RAM of the primary COG. This COG will then start interpreting the bytecodes in the main 32 KB RAM.
More than one copy of the bytecode interpreter can run in other COGs, so several Spin code threads
can run simultaneously.
Within a Spin code program, assembler code program(s) can be "inline
" inserted. These assembler program(s) will then run on their own COG's.
Like Python
, Spin uses indentation/whitespace, rather than curly braces or keywords
, to delimit blocks.
The Propeller's interpreter for its proprietary multi-threaded
SPIN computer language is a byte code interpreter. This interpreter decodes strings of instructions, one instruction per byte
, from user code which has been edited, compiled, and loaded onto the Propeller from within a purpose-specific IDE. This IDE, which Parallax simply calls "The Propeller tool", is intended for use under the Windows
operating system.
The SPIN language is a high level language. Because it is interpreted in software, it runs slower than pure Propeller assembly but can be more space-efficient (Propeller assembly opcodes are 32 bits long; SPIN directives are 8 bits long, which may be followed by a number of 8-bit bytes to specify how that directive operates). SPIN also allows users to avoid significant memory segmentation issues that must be considered for assembly code.
Mixing SPIN and assembly code is straightforward; SPIN is more appropriate for high-level logic, while assembly routines may be required for I/O routines that require exact timing.
At startup, a copy of the byte code interpreter (less than 2 KB in size), will be copied into the dedicated RAM of a cog and will then start interpreting byte code in the main 32 KB RAM. Additional cogs can be started from that point, loading a separate copy of the interpreter into the new cog's dedicated RAM (a total of eight interpreter threads can, therefore, run simultaneously). Notably, this means that at least a minimal amount of startup code must be SPIN code, for all Propeller applications.
VAR Holds global variables
CON Holds program constants
PUB Holds code for a public subroutine
PRI Holds code for a private subroutine
OBJ Holds code for objects
DAT Holds predefined data, memory reservations and assembly code
waitcnt: wait for the system counter to equal or exceed a specified value
waitvid: Waits for a (video) timing event before outputting (video) data to I/O pins.
coginit: starts a processor on a new task
The Parallax Propeller is gradually accumulating software libraries which give it similar functionality to Parallax's older BASIC Stamp
product; however there is no uniform list of which PBASIC
facilities now have Spin equivalents.
, 44-pin LQFP
, or QFN
package
. Of the 40 available pins, 32 are used for I/O, four for power and ground pins, two for an external crystal (if used), one to enable brownout
-detection, and one for reset.
All 8 cores can access the 32-bit port (designated "A"; there is currently no "B") simultaneously. A special control mechanism is used to avoid I/O conflicts if one core attempts to use an I/O pin as an output while another tries to use it as input. Any of these pins can be used for the timing or pulse-width modulation output techniques described above.
Parallax has stated that it expects later versions of the Propeller to offer more I/O pins and/or more memory.
For example, the "HYDRA Game Development Kit", (a computer system designed for hobbyists, to learn to develop "retro-style" video games) uses the built in character generator and video support logic to generate a virtual
Video display generator that outputs VGA colour pictures, PAL/NTSC compatible colour pictures or broadcast RF video+audio in software.
The screen capture displayed here was made using a software "virtual display driver" that sends the pixel data over a serial link to a PC.
Software libraries are available to implement several I/O devices ranging from simple UARTs and Serial I/O interfaces such as SPI, I2C and PS/2 compatible serial mouse and keyboard interfaces, motor drivers for robotic systems, MIDI interfaces and LCD controllers.
hardware and support in assembly. In traditional CPU architecture, external interrupt lines are fed to an on-chip interrupt controller and are serviced by one or more interrupt service routines. When an interrupt occurs, the interrupt controller suspends normal CPU processing and saves internal state (typically on the stack), then vectors to the designated interrupt service routine. After handling the interrupt, the service routine executes a "return from interrupt" instruction which restores the internal state and resumes CPU processing.
To handle an external signal promptly on the Propeller, any one of the 32 I/O lines is configured as an input. A cog is then configured to wait for a transition (either positive or negative edge) on that input using one of the two counter circuits available to each cog. While waiting for the signal, the cog operates in low-power mode, essentially sleeping. Extending this technique, a Propeller can be set up to respond to eight independent "interrupt" lines with essentially zero handling delay. Alternately, a single line can be used to signal the "interrupt" and then additional input lines can be read to determine the nature of the event. The code running in the other cores is not affected by the interrupt handling cog. Unlike a traditional multitasking single-processor interrupt architecture, the signal response timing remains predictable
, and indeed using the term "interrupt" in this context can cause confusion, since this functionality can be more properly thought of as polling with a zero loop time.
detection, software reset, or external hardware reset, the Propeller will load a machine-code boot routine
from the internal ROM into the RAM of its first (primary) cog and execute it. This code emulates
an I2C
interface in software, temporarily using two I/O pins for the needed serial clock and data signals to load user code from an external I2C EEPROM
.
Simultaneously, it emulates a serial port
, using two other I/O pins that can be used to upload software directly to RAM (and optionally to the external EEPROM). If the Propeller does not see any commands from the serial port, it will load the user program (the entry code of which must be written in SPIN, as described above) from the serial EEPROM into the main 32K RAM. After that it will load the SPIN interpreter from its built-in ROM into the dedicated RAM of its first cog, thereby overwriting most of the bootloader.
Regardless of how the user program is loaded, execution starts by interpreting initial user bytecode
with the SPIN interpreter running in the primary cog. After this initial SPIN code runs, the application can turn on any unused cog to start a new thread
, and/or start assembler code routines.
; once the boot sequence completes, this device may be accessed as an external peripheral.
editor and resulting code is emitted as SPIN source. PICoPLC also supports P8X32 with create-simulate-run feature. No restrictions on target hardware as the oscillator frequency and IO pins are freely configurable in the ladder editor. PICoPLC is free to use and distribute.
Parallax, Inc. (company)
Parallax Inc. is a privately held company in Rocklin, California. Parallax Inc. designs, manufactures, and sells BASIC Stamp microcontrollers, Propeller microcontrollers, microcontroller accessories Parallax Inc. is a privately held company in Rocklin, California. Parallax Inc. designs,...
P8X32A Propeller chip, introduced in 2006, is a multi-core architecture
Computer architecture
In computer science and engineering, computer architecture is the practical art of selecting and interconnecting hardware components to create computers that meet functional, performance and cost goals and the formal modelling of those systems....
parallel
Parallel computing
Parallel computing is a form of computation in which many calculations are carried out simultaneously, operating on the principle that large problems can often be divided into smaller ones, which are then solved concurrently . There are several different forms of parallel computing: bit-level,...
microcontroller
Microcontroller
A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM...
with eight 32-bit
32-bit
The range of integer values that can be stored in 32 bits is 0 through 4,294,967,295. Hence, a processor with 32-bit memory addresses can directly access 4 GB of byte-addressable memory....
RISC
Reduced instruction set computer
Reduced instruction set computing, or RISC , is a CPU design strategy based on the insight that simplified instructions can provide higher performance if this simplicity enables much faster execution of each instruction. A computer based on this strategy is a reduced instruction set computer...
CPU
Central processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
cores.
The Parallax Propeller microcontroller, Propeller Assembly language
Assembly language
An assembly language is a low-level programming language for computers, microprocessors, microcontrollers, and other programmable devices. It implements a symbolic representation of the machine codes and other constants needed to program a given CPU architecture...
, and Spin interpreter
Interpreter (computing)
In computer science, an interpreter normally means a computer program that executes, i.e. performs, instructions written in a programming language...
were designed by one person, Parallax's co-founder and president Chip Gracey. The Spin Programming language
Programming language
A programming language is an artificial language designed to communicate instructions to a machine, particularly a computer. Programming languages can be used to create programs that control the behavior of a machine and/or to express algorithms precisely....
and "Propeller Tool" integrated development environment
Integrated development environment
An integrated development environment is a software application that provides comprehensive facilities to computer programmers for software development...
were designed by Chip Gracey and Parallax's software engineer Jeff Martin. The Propeller is known for being easy to program.
Multi-core architecture
Each of the eight 32-bit cores (called a cog) has a CPUCentral processing unit
The central processing unit is the portion of a computer system that carries out the instructions of a computer program, to perform the basic arithmetical, logical, and input/output operations of the system. The CPU plays a role somewhat analogous to the brain in the computer. The term has been in...
which has access to 512 32-bit long words (2 KB
Kilobyte
The kilobyte is a multiple of the unit byte for digital information. Although the prefix kilo- means 1000, the term kilobyte and symbol KB have historically been used to refer to either 1024 bytes or 1000 bytes, dependent upon context, in the fields of computer science and information...
) of instructions and data. Self-modifying code
Self-modifying code
In computer science, self-modifying code is code that alters its own instructions while it is executing - usually to reduce the instruction path length and improve performance or simply to reduce otherwise repetitively similar code, thus simplifying maintenance...
is possible and is used internally, for example by an instruction that is used to create a subroutine call/return mechanism without the need for a stack. Access to shared memory (32 KB RAM; 32 KB ROM
Read-only memory
Read-only memory is a class of storage medium used in computers and other electronic devices. Data stored in ROM cannot be modified, or can be modified only slowly or with difficulty, so it is mainly used to distribute firmware .In its strictest sense, ROM refers only...
) is controlled in round-robin
Round-robin scheduling
Round-robin is one of the simplest scheduling algorithms for processes in an operating system. As the term is generally used, time slices are assigned to each process in equal portions and in circular order, handling all processes without priority . Round-robin scheduling is simple, easy to...
fashion by an internal bus
Computer bus
In computer architecture, a bus is a subsystem that transfers data between components inside a computer, or between computers.Early computer buses were literally parallel electrical wires with multiple connections, but the term is now used for any physical arrangement that provides the same...
controller called the hub. Each cog also has access to two dedicated hardware counters and two special "video registers" for use in generating PAL
PAL
PAL, short for Phase Alternating Line, is an analogue television colour encoding system used in broadcast television systems in many countries. Other common analogue television systems are NTSC and SECAM. This page primarily discusses the PAL colour encoding system...
, NTSC
NTSC
NTSC, named for the National Television System Committee, is the analog television system that is used in most of North America, most of South America , Burma, South Korea, Taiwan, Japan, the Philippines, and some Pacific island nations and territories .Most countries using the NTSC standard, as...
, VGA
Video Graphics Array
Video Graphics Array refers specifically to the display hardware first introduced with the IBM PS/2 line of computers in 1987, but through its widespread adoption has also come to mean either an analog computer display standard, the 15-pin D-subminiature VGA connector or the 640×480 resolution...
, servo
Servomechanism
thumb|right|200px|Industrial servomotorThe grey/green cylinder is the [[Brush |brush-type]] [[DC motor]]. The black section at the bottom contains the [[Epicyclic gearing|planetary]] [[Reduction drive|reduction gear]], and the black object on top of the motor is the optical [[rotary encoder]] for...
-control, or other timing signals.
Speed and power management
The Propeller can be clocked using either an internal, on-chip oscillator (providing a lower total parts count, but sacrificing some accuracy and thermalThermodynamics
Thermodynamics is a physical science that studies the effects on material bodies, and on radiation in regions of space, of transfer of heat and of work done on or by the bodies or radiation...
stability) or an external crystal
Crystal oscillator
A crystal oscillator is an electronic oscillator circuit that uses the mechanical resonance of a vibrating crystal of piezoelectric material to create an electrical signal with a very precise frequency...
or resonator
Ceramic resonator
A ceramic resonator is an electronic component that when combined with other appropriate components, can produce oscillations at a specific frequency...
(providing higher maximum speed with greater accuracy at an increased total cost). Only the external oscillator may be run through an on-chip PLL
Phase-locked loop
A phase-locked loop or phase lock loop is a control system that generates an output signal whose phase is related to the phase of an input "reference" signal. It is an electronic circuit consisting of a variable frequency oscillator and a phase detector...
clock multiplier, which may be set at 1x, 2x, 4x, 8x, or 16x.
Both the on-board oscillator frequency (if used) and the PLL multiplier value may be changed at run-time. If used correctly, this can improve power efficiency; for example, the PLL multiplier can be decreased before a long "no operation" wait required for timing purposes, then increased afterwards, causing the processor to use less power. However, the utility of this technique is limited to situations where no other cog is executing timing-dependent code (or is carefully designed to cope with the change), since the effective clock rate is common to all cogs.
The effective clock rate ranges from 32 kHz up to 80 MHz (with the exact values available for dynamic control dependent on the configuration used, as described above). When running at 80 MHz, the proprietary interpreted Spin programming language executes approximately 80,000 instruction-tokens per second on each core, giving 8 times 80,000 for 640,000 high level instructions per second. Most machine-language instructions take 4 clock-cycles to execute, resulting in 20 MIPS
Instructions per second
Instructions per second is a measure of a computer's processor speed. Many reported IPS values have represented "peak" execution rates on artificial instruction sequences with few branches, whereas realistic workloads typically lead to significantly lower IPS values...
per cog, or 160 MIPS in total for an 8-cog Propeller.
In addition to lowering the clock rate to that actually required, power consumption can be reduced by turning off cogs (which then use very little power), and by reconfiguring I/O pins which are not needed, or can be safely placed in a high-impedance state ("tristated
Three-state logic
In digital electronics three-state, tri-state, or 3-state logic allows an output port to assume a high impedance state in addition to the 0 and 1 logic levels, effectively removing the output from the circuit...
"), as inputs. Pins can be reconfigured dynamically, but again, the change applies to all cogs, so synchronization is important for certain designs. (Some protection is available for situations where one core attempts to use a pin as an output while another attempts to use it as an input; this is explained in Parallax's technical reference manual.)
On-board peripherals
Each cog has access to some dedicated counter/timer hardware, and a special timing signal generator intended to simplify the design of video output stages, such as composite PALPAL
PAL, short for Phase Alternating Line, is an analogue television colour encoding system used in broadcast television systems in many countries. Other common analogue television systems are NTSC and SECAM. This page primarily discusses the PAL colour encoding system...
or NTSC
NTSC
NTSC, named for the National Television System Committee, is the analog television system that is used in most of North America, most of South America , Burma, South Korea, Taiwan, Japan, the Philippines, and some Pacific island nations and territories .Most countries using the NTSC standard, as...
displays (including modulation
Modulation
In electronics and telecommunications, modulation is the process of varying one or more properties of a high-frequency periodic waveform, called the carrier signal, with a modulating signal which typically contains information to be transmitted...
for broadcast) and VGA monitors. Parallax thus makes sample code available which can generate video signals (text and somewhat low-resolution graphics) using a minimum parts count consisting of the Propeller, a crystal oscillator, and a few resistors to form a crude DAC
Digital-to-analog converter
In electronics, a digital-to-analog converter is a device that converts a digital code to an analog signal . An analog-to-digital converter performs the reverse operation...
. The frequency of the oscillator is important, as the correction ability of the video timing hardware is limited to the clock rate. It is possible to use multiple cogs in parallel to generate a single video signal. More generally, the timing hardware can be used to implement various pulse-width modulated
Pulse-width modulation
Pulse-width modulation , or pulse-duration modulation , is a commonly used technique for controlling power to inertial electrical devices, made practical by modern electronic power switches....
(PWM) timing signals.
ROM extensions
In addition to the Spin interpreter and a bootloader, the built-in ROM provides some data which may be useful for certain sound, video, or mathematical applications:- a bitmap fontFontIn typography, a font is traditionally defined as a quantity of sorts composing a complete character set of a single size and style of a particular typeface...
is provided, suitable for typical character generation applications (but not customizable); - a logarithmLogarithmThe logarithm of a number is the exponent by which another fixed value, the base, has to be raised to produce that number. For example, the logarithm of 1000 to base 10 is 3, because 1000 is 10 to the power 3: More generally, if x = by, then y is the logarithm of x to base b, and is written...
table (base 2, 2048 entries); - an antilog table (base 2, 2048 entries); and
- a sine table (16-bit, 2049 entries representing first quadrant, angles from 0 to π/2; other three quadrants are created from the same table).
The math extensions are intended to help compensate for the lack of a floating-point unit as well as more primitive missing operations, such as multiplication and division (this is masked in Spin but is a limitation for assembly language
Assembly language
An assembly language is a low-level programming language for computers, microprocessors, microcontrollers, and other programmable devices. It implements a symbolic representation of the machine codes and other constants needed to program a given CPU architecture...
routines). The Propeller is a 32-bit processor, however, and these tables may not have sufficient accuracy for higher-precision applications.
Built in SPIN byte code interpreter
Spin is a multitaskingComputer multitasking
In computing, multitasking is a method where multiple tasks, also known as processes, share common processing resources such as a CPU. In the case of a computer with a single CPU, only one task is said to be running at any point in time, meaning that the CPU is actively executing instructions for...
high level
High level
High Level may refer to:In computing*High-level assembler, a type of assembly language translator*High Level Architecture , a military computer simulation framework*High-level programming language, a type of computer programming language...
computer programming language created by Parallax
Parallax
Parallax is a displacement or difference in the apparent position of an object viewed along two different lines of sight, and is measured by the angle or semi-angle of inclination between those two lines. The term is derived from the Greek παράλλαξις , meaning "alteration"...
's Chip Gracey, who also designed the Propeller microcontroller
Microcontroller
A microcontroller is a small computer on a single integrated circuit containing a processor core, memory, and programmable input/output peripherals. Program memory in the form of NOR flash or OTP ROM is also often included on chip, as well as a typically small amount of RAM...
on which it runs, for their line of Propeller microcontrollers.
Spin code is written on the Propeller Tool, a GUI oriented software development platform written for Windows XP. This compiler converts the Spin code into bytecode
Bytecode
Bytecode, also known as p-code , is a term which has been used to denote various forms of instruction sets designed for efficient execution by a software interpreter as well as being suitable for further compilation into machine code...
s that can be loaded (with the same tool) into the main 32 KB RAM, and optionally into the serial boot FLASH EEPROM, of the Propeller chip. After booting the propeller a bytecode interpreter is copied from the built in ROM into the 2 KB RAM of the primary COG. This COG will then start interpreting the bytecodes in the main 32 KB RAM.
More than one copy of the bytecode interpreter can run in other COGs, so several Spin code threads
Thread (computer science)
In computer science, a thread of execution is the smallest unit of processing that can be scheduled by an operating system. The implementation of threads and processes differs from one operating system to another, but in most cases, a thread is contained inside a process...
can run simultaneously.
Within a Spin code program, assembler code program(s) can be "inline
Inline
inline may relate to:* Inline citation or reference* Inline engine * Computers** Inline expansion** Inline function** Inline assembler** inline tag * Internet Posting Style** Inline replying...
" inserted. These assembler program(s) will then run on their own COG's.
Like Python
Python (programming language)
Python is a general-purpose, high-level programming language whose design philosophy emphasizes code readability. Python claims to "[combine] remarkable power with very clear syntax", and its standard library is large and comprehensive...
, Spin uses indentation/whitespace, rather than curly braces or keywords
Keywords
Keywords are the words that are used to reveal the internal structure of an author's reasoning. While they are used primarily for rhetoric, they are also used in a strictly grammatical sense for structural composition, reasoning, and comprehension...
, to delimit blocks.
The Propeller's interpreter for its proprietary multi-threaded
Thread (computer science)
In computer science, a thread of execution is the smallest unit of processing that can be scheduled by an operating system. The implementation of threads and processes differs from one operating system to another, but in most cases, a thread is contained inside a process...
SPIN computer language is a byte code interpreter. This interpreter decodes strings of instructions, one instruction per byte
Byte
The byte is a unit of digital information in computing and telecommunications that most commonly consists of eight bits. Historically, a byte was the number of bits used to encode a single character of text in a computer and for this reason it is the basic addressable element in many computer...
, from user code which has been edited, compiled, and loaded onto the Propeller from within a purpose-specific IDE. This IDE, which Parallax simply calls "The Propeller tool", is intended for use under the Windows
Microsoft Windows
Microsoft Windows is a series of operating systems produced by Microsoft.Microsoft introduced an operating environment named Windows on November 20, 1985 as an add-on to MS-DOS in response to the growing interest in graphical user interfaces . Microsoft Windows came to dominate the world's personal...
operating system.
The SPIN language is a high level language. Because it is interpreted in software, it runs slower than pure Propeller assembly but can be more space-efficient (Propeller assembly opcodes are 32 bits long; SPIN directives are 8 bits long, which may be followed by a number of 8-bit bytes to specify how that directive operates). SPIN also allows users to avoid significant memory segmentation issues that must be considered for assembly code.
Mixing SPIN and assembly code is straightforward; SPIN is more appropriate for high-level logic, while assembly routines may be required for I/O routines that require exact timing.
At startup, a copy of the byte code interpreter (less than 2 KB in size), will be copied into the dedicated RAM of a cog and will then start interpreting byte code in the main 32 KB RAM. Additional cogs can be started from that point, loading a separate copy of the interpreter into the new cog's dedicated RAM (a total of eight interpreter threads can, therefore, run simultaneously). Notably, this means that at least a minimal amount of startup code must be SPIN code, for all Propeller applications.
Syntax
The syntax of Spin can be broken down into blocks. The blocks are as following.VAR Holds global variables
CON Holds program constants
PUB Holds code for a public subroutine
PRI Holds code for a private subroutine
OBJ Holds code for objects
DAT Holds predefined data, memory reservations and assembly code
Example keywords
reboot: causes the microcontroller to rebootwaitcnt: wait for the system counter to equal or exceed a specified value
waitvid: Waits for a (video) timing event before outputting (video) data to I/O pins.
coginit: starts a processor on a new task
Example program
An example program, (as it would appear in the "Propeller Tool" editor) which outputs the current system counter every 3,000,000 cycles, then is shut down by another cog after 40,000,000 cycles:The Parallax Propeller is gradually accumulating software libraries which give it similar functionality to Parallax's older BASIC Stamp
BASIC Stamp
The BASIC Stamp is a microcontroller with a small, specialized BASIC interpreter built into ROM. It is made by Parallax, Inc. and has been popular with electronics hobbyists since the early 1990s because of its low threshold of learning and ease of use due to its simple to understand BASIC...
product; however there is no uniform list of which PBASIC
PBASIC
PBASIC is a microcontroller based version of BASIC created by Parallax, Inc. The language was created to bring ease of use to the microcontroller and embedded processor world. PBASIC is used for writing code for the BASIC Stamp microcontrollers. After the code is written it is tokenized and...
facilities now have Spin equivalents.
Package and I/O
The initial version of the chip (called the P8X32) provides one 32 bit port in a 40-pin 0.6" DIPDual in-line package
In microelectronics, a dual in-line package is an electronic device package with a rectangular housing and two parallel rows of electrical connecting pins. The package may be through-hole mounted to a printed circuit board or inserted in a socket.A DIP is usually referred to as a DIPn, where n is...
, 44-pin LQFP
LQFP
A Low-profile Quad Flat Package is a surface mount integrated circuit package format with component leads extending from each of the four sides. Pins are numbered counter-clockwise from the index dot. Spacing between pins can vary; common spacings are 0.4, 0.5, 0.65 and 0.80 mm intervals....
, or QFN
QFN
Flat no-leads packages such as QFN and DFN physically and electrically connect integrated circuits to printed circuit boards. Flat no-leads, also known as MicroLeadFrame, is a surface-mount technology, one of several package technologies that connect ICs to the surfaces of PCBs without...
package
Surface-mount technology
Surface mount technology is a method for constructing electronic circuits in which the components are mounted directly onto the surface of printed circuit boards . An electronic device so made is called a surface mount device...
. Of the 40 available pins, 32 are used for I/O, four for power and ground pins, two for an external crystal (if used), one to enable brownout
Power outage
A power outage is a short- or long-term loss of the electric power to an area.There are many causes of power failures in an electricity network...
-detection, and one for reset.
All 8 cores can access the 32-bit port (designated "A"; there is currently no "B") simultaneously. A special control mechanism is used to avoid I/O conflicts if one core attempts to use an I/O pin as an output while another tries to use it as input. Any of these pins can be used for the timing or pulse-width modulation output techniques described above.
Parallax has stated that it expects later versions of the Propeller to offer more I/O pins and/or more memory.
Virtual I/O devices
The Propeller's designers designed it around the concept of "virtual I/O devices".For example, the "HYDRA Game Development Kit", (a computer system designed for hobbyists, to learn to develop "retro-style" video games) uses the built in character generator and video support logic to generate a virtual
Virtual machine
A virtual machine is a "completely isolated guest operating system installation within a normal host operating system". Modern virtual machines are implemented with either software emulation or hardware virtualization or both together.-VM Definitions:A virtual machine is a software...
Video display generator that outputs VGA colour pictures, PAL/NTSC compatible colour pictures or broadcast RF video+audio in software.
The screen capture displayed here was made using a software "virtual display driver" that sends the pixel data over a serial link to a PC.
Software libraries are available to implement several I/O devices ranging from simple UARTs and Serial I/O interfaces such as SPI, I2C and PS/2 compatible serial mouse and keyboard interfaces, motor drivers for robotic systems, MIDI interfaces and LCD controllers.
Dedicated cores instead of interrupts
The design philosophy of the Propeller is that a hard real-time multi-core architecture negates the need for dedicated interruptInterrupt
In computing, an interrupt is an asynchronous signal indicating the need for attention or a synchronous event in software indicating the need for a change in execution....
hardware and support in assembly. In traditional CPU architecture, external interrupt lines are fed to an on-chip interrupt controller and are serviced by one or more interrupt service routines. When an interrupt occurs, the interrupt controller suspends normal CPU processing and saves internal state (typically on the stack), then vectors to the designated interrupt service routine. After handling the interrupt, the service routine executes a "return from interrupt" instruction which restores the internal state and resumes CPU processing.
To handle an external signal promptly on the Propeller, any one of the 32 I/O lines is configured as an input. A cog is then configured to wait for a transition (either positive or negative edge) on that input using one of the two counter circuits available to each cog. While waiting for the signal, the cog operates in low-power mode, essentially sleeping. Extending this technique, a Propeller can be set up to respond to eight independent "interrupt" lines with essentially zero handling delay. Alternately, a single line can be used to signal the "interrupt" and then additional input lines can be read to determine the nature of the event. The code running in the other cores is not affected by the interrupt handling cog. Unlike a traditional multitasking single-processor interrupt architecture, the signal response timing remains predictable
Deterministic automaton
Deterministic automaton is a concept of automata theory in which the outcome of a transition from one state to another given a certain input can be predicted for every occurrence....
, and indeed using the term "interrupt" in this context can cause confusion, since this functionality can be more properly thought of as polling with a zero loop time.
Boot mechanism
On power up, brownoutPower outage
A power outage is a short- or long-term loss of the electric power to an area.There are many causes of power failures in an electricity network...
detection, software reset, or external hardware reset, the Propeller will load a machine-code boot routine
Booting
In computing, booting is a process that begins when a user turns on a computer system and prepares the computer to perform its normal operations. On modern computers, this typically involves loading and starting an operating system. The boot sequence is the initial set of operations that the...
from the internal ROM into the RAM of its first (primary) cog and execute it. This code emulates
Emulator
In computing, an emulator is hardware or software or both that duplicates the functions of a first computer system in a different second computer system, so that the behavior of the second system closely resembles the behavior of the first system...
an I2C
I²C
I²C is a multi-master serial single-ended computer bus invented by Philips that is used to attach low-speed peripherals to a motherboard, embedded system, cellphone, or other electronic device. Since the mid 1990s, several competitors I²C ("i-squared cee" or "i-two cee"; Inter-Integrated Circuit;...
interface in software, temporarily using two I/O pins for the needed serial clock and data signals to load user code from an external I2C EEPROM
EEPROM
EEPROM stands for Electrically Erasable Programmable Read-Only Memory and is a type of non-volatile memory used in computers and other electronic devices to store small amounts of data that must be saved when power is removed, e.g., calibration...
.
Simultaneously, it emulates a serial port
Serial port
In computing, a serial port is a serial communication physical interface through which information transfers in or out one bit at a time...
, using two other I/O pins that can be used to upload software directly to RAM (and optionally to the external EEPROM). If the Propeller does not see any commands from the serial port, it will load the user program (the entry code of which must be written in SPIN, as described above) from the serial EEPROM into the main 32K RAM. After that it will load the SPIN interpreter from its built-in ROM into the dedicated RAM of its first cog, thereby overwriting most of the bootloader.
Regardless of how the user program is loaded, execution starts by interpreting initial user bytecode
Bytecode
Bytecode, also known as p-code , is a term which has been used to denote various forms of instruction sets designed for efficient execution by a software interpreter as well as being suitable for further compilation into machine code...
with the SPIN interpreter running in the primary cog. After this initial SPIN code runs, the application can turn on any unused cog to start a new thread
Thread (computer science)
In computer science, a thread of execution is the smallest unit of processing that can be scheduled by an operating system. The implementation of threads and processes differs from one operating system to another, but in most cases, a thread is contained inside a process...
, and/or start assembler code routines.
External persistent memory
The Propeller boots from an external serial EEPROMEEPROM
EEPROM stands for Electrically Erasable Programmable Read-Only Memory and is a type of non-volatile memory used in computers and other electronic devices to store small amounts of data that must be saved when power is removed, e.g., calibration...
; once the boot sequence completes, this device may be accessed as an external peripheral.
C compiler
There is also a C compiler available from ImageCraft, the ICCV7 for Propeller. It has been marked to End Of Life state. It supports the 32K Large Memory Model, to bypass the 2K limitation per cog, and is typically 5 to 10 times faster than standard SPIN code. A free ANSI C compiler called Catalina is also available. It is based on LCC.Propeller and Java
There is also a movement in place to put the JVM on Propeller. A compiler, debugger, and emulator are being developed.Graphical Programming
PICoPLC supports output to Propeller processor. The program is created in a GUI ladder logicLadder logic
Ladder logic is a programming language that represents a program by a graphical diagram based on the circuit diagrams of relay logic hardware. It is primarily used to develop software for programmable logic controllers used in industrial control applications...
editor and resulting code is emitted as SPIN source. PICoPLC also supports P8X32 with create-simulate-run feature. No restrictions on target hardware as the oscillator frequency and IO pins are freely configurable in the ladder editor. PICoPLC is free to use and distribute.